A 130nm 1Mb Embedded Phase Change Memory with 500kb/s Single Channel Write Throughput

Abstract A 130 nm 1Mb embedded phase change memory (PCM) has been achieved, requiring only three additional masks for phase change storage element, featuring 500 kb/s single channel write throughput and > 10 8 endurance. The prepare process has been optimized to reduce the cost and power. An 80 nm heat electrode has been prepared with 130 nm process. The optimal Read/Write circuit module is designed to realize the load/store function for PCM. The critical operation parameter is Reset/70 ns/2.5 mA and Set/1500 ns/1 mA, which means that the signal channel write throughput arrives to 500 kb/s

Nanoscale resistive switching memory devices: a review

In this review the different concepts of nanoscale resistive switching memory devices are described and classified according to their I–V behaviour and the underlying physical switching mechanisms. By means of the most important representative devices, the current state of electrical performance characteristics is illuminated in-depth. Moreover, the ability of resistive switching devices to be integrated into state-of-the-art CMOS circuits under the additional consideration with a suitable selector device for memory array operation is assessed. From this analysis, and by factoring in the maturity of the different concepts, a ranking methodology for application of the nanoscale resistive switching memory devices in the memory landscape is derived. Finally, the suitability of the different device concepts for beyond pure memory applications, such as brain inspired and neuromorphic computational or logic in memory applications that strive to overcome the vanNeumann bottleneck, is discussed

Fast and reliable storage using a 5 bit, nonvolatile photonic memory cell

This is the final version. Available from Optical Society of America via the DOI in this record.Optically storing and addressing data on photonic chips is of particular interest as such capability would eliminate optoelectronic conversion losses in data centers. It would also enable on-chip non-von Neumann photonic computing by allowing multinary data storage with high fidelity. Here, we demonstrate such an optically addressed, multilevel memory capable of storing up to 34 nonvolatile reliable and repeatable levels (over 5 bits) using the phase change material Ge2Sb2Te5 integrated on a photonic waveguide. Crucially, we demonstrate for the first time, to the best of our knowledge, a technique that allows us to program the device with a single pulse regardless of the previous state of the material, providing an order of magnitude improvement over previous demonstrations in terms of both time and energy consumption. We also investigate the influence of write-and-erase pulse parameters on the single-pulse recrystallization, amorphization, and readout error in our multilevel memory, thus tailoring pulse properties for optimum performance. Our work represents a significant step in the development of photonic memories and their potential for novel integrated photonic applications.Engineering and Physical Sciences Research Council (EPSRC)European CommissionDeutsche Forschungsgemeinschaft (DFG)Horizon 2020 Framework Programme (H2020

Stochastic Memory Devices for Security and Computing

With the widespread use of mobile computing and internet of things, secured communication and chip authentication have become extremely important. Hardware-based security concepts generally provide the best performance in terms of a good standard of security, low power consumption, and large-area density. In these concepts, the stochastic properties of nanoscale devices, such as the physical and geometrical variations of the process, are harnessed for true random number generators (TRNGs) and physical unclonable functions (PUFs). Emerging memory devices, such as resistive-switching memory (RRAM), phase-change memory (PCM), and spin-transfer torque magnetic memory (STT-MRAM), rely on a unique combination of physical mechanisms for transport and switching, thus appear to be an ideal source of entropy for TRNGs and PUFs. An overview of stochastic phenomena in memory devices and their use for developing security and computing primitives is provided. First, a broad classification of methods to generate true random numbers via the stochastic properties of nanoscale devices is presented. Then, practical implementations of stochastic TRNGs, such as hardware security and stochastic computing, are shown. Finally, future challenges to stochastic memory development are discussed

Conductive bridging RAM devices inspired on solid-state biopolymer electrolytes

This work reports the design, fabrication and characterization of metal-insulator-metal (MIM) structures acting as conductive bridging random access memory (CBRAM) devices using biopolymer insulator. Chitosan and hydroxypropyl cellulose (HPC) were deposited by spin coating in between evaporated Pt and Ag electrodes. CBRAM devices fabricated using chitosan as the insulating layer demonstrated retention times of up to 105 s with an on/off ratio of 102 as well as enduring several program/erase cycles. Devices fabricated with HPC showed retention times of up to 104 s with an on/off ratio of approximately 106, and also showed stable device operation over several cycles. Furthermore, the functionalization of chitosan with silver nanoparticles and its integration in the MIM structures were investigated, as well as the substitution of the e-beam evaporated Ag electrode by a screen printed Ag electrode