Digital Controlled Multi-phase Buck Converter with Accurate Voltage and Current Control

abstract: A 4-phase, quasi-current-mode hysteretic buck converter with digital frequency synchronization, online comparator offset-calibration and digital current sharing control is presented. The switching frequency of the hysteretic converter is digitally synchronized to the input clock reference with less than ±1.5% error in the switching frequency range of 3-9.5MHz. The online offset calibration cancels the input-referred offset of the hysteretic comparator and enables ±1.1% voltage regulation accuracy. Maximum current-sharing error of ±3.6% is achieved by a duty-cycle-calibrated delay line based PWM generator, without affecting the phase synchronization timing sequence. In light load conditions, individual converter phases can be disabled, and the final stage power converter output stage is segmented for high efficiency. The DC-DC converter achieves 93% peak efficiency for Vi = 2V and Vo = 1.6V.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

A Fast Transient Response ESR-Controlled Fixed Frequency Hysteretic Buck Converter

Modern application processors (microprocessors and Digital Signal Processors) are power hungry and demand power management solutions that can withstand their frequent and high slew-rate load transients while regulating their supply in a tight voltage tolerance. Hysteretic converter has excellent transient response performance but its variable switching frequency causes concern for electromagnetic interference in noise sensitive applications. A new frequency stabilization scheme for hysteretic buck dc-dc converters is proposed in this thesis. The equivalent series resistance (ESR) of the output capacitor is regulated by a phase-locked loop (PLL) to stabilize the operating frequency of the converter. The proposed fixed frequency ESR-controlled converter achieves a fixed 2MHz switching frequency, with less than 1µs response time to a 500mA load step while limiting undershoot and overshoot on the output voltage to 50mV and 40mV respectively. The performance of the presented work shows that the ESR of the output capacitor of a Hysteretic Buck Converter can be controlled to stabilize the switching frequency of the Hysteretic DC-DC Converter

Time-Domain/Digital Frequency Synchronized Hysteresis Based Fully Integrated Voltage Regulator

abstract: Power management integrated circuit (PMIC) design is a key module in almost all electronics around us such as Phones, Tablets, Computers, Laptop, Electric vehicles, etc. The on-chip loads such as microprocessors cores, memories, Analog/RF, etc. requires multiple supply voltage domains. Providing these supply voltages from off-chip voltage regulators will increase the overall system cost and limits the performance due to the board and package parasitics. Therefore, an on-chip fully integrated voltage regulator (FIVR) is required. The dissertation presents a topology for a fully integrated power stage in a DC-DC buck converter achieving a high-power density and a time-domain hysteresis based highly integrated buck converter. A multi-phase time-domain comparator is proposed in this work for implementing the hysteresis control, thereby achieving a process scaling friendly highly digital design. A higher-order LC notch filter along with a flying capacitor which couples the input and output voltage ripple is implemented. The power stage operates at 500 MHz and can deliver a maximum power of 1.0 W and load current of 1.67 A, while occupying 1.21 mm2 active die area. Thus achieving a power density of 0.867 W/mm2 and current density of 1.377 A/mm2. The peak efficiency obtained is 71% at 780 mA of load current. The power stage with the additional off-chip LC is utilized to design a highly integrated current mode hysteretic buck converter operating at 180 MHz. It achieves 20 ns of settling and 2-5 ns of rise/fall time for reference tracking. The second part of the dissertation discusses an integrated low voltage switched-capacitor based power sensor, to measure the output power of a DC-DC boost converter. This approach results in a lower complexity, area, power consumption, and a lower component count for the overall PV MPPT system. Designed in a 180 nm CMOS process, the circuit can operate with a supply voltage of 1.8 V. It achieves a power sense accuracy of 7.6%, occupies a die area of 0.0519 mm2, and consumes 0.748 mW of power.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

Time-based control techniques for integrated DC-DC conversion

Time-based control techniques for the design of high switching frequency buck converters are presented. Using time as the processing variable, the proposed controller operates with CMOS-level digital-like signals but without adding any quantization error. A ring oscillator is used as an integrator in place of conventional opamp-RC or Gm-C integrators while a delay line is used to perform voltage-to-time conversion and to sum time signals. A simple flip-flop generates a pulse-width modulated signal from the time-based output of the controller. Hence time-based control eliminates the need for a wide bandwidth error amplifier, pulse width modulator (PWM) in analog controllers or high-resolution analog-to-digital converter (ADC) and digital PWM in digital controllers. As a result, it can be implemented in a small area and with minimal power. First, a time-based single-phase buck converter is proposed and fabricated in a 180nm CMOS process, the prototype buck converter occupies an active area of 0.24mm^2, of which the controller occupies only 0.0375mm^2. It operates over a wide range of switching frequencies (10-25 MHz) and regulates output to any desired voltage in the range of 0.6V to 1.5V with 1.8V input voltage. With a 500mA step in the load current, the settling time is less than 3.5us and the measured reference tracking bandwidth is about 1MHz. Better than 94% peak efficiency is achieved while consuming a quiescent current of only 2uA/MHz. Second, the techniques are extended to a high switching frequency multi-phase buck converter. Efficiency degradation due to mismatch between the phases is mitigated by generating precisely matched duty-cycles by combining a time-based multi-phase generator (MPG) with a time-based PID compensator (T-PID). The proposed approach obviates the need for a complex current sensing and calibration circuitry needed to implement active current sharing in an analog controller. It also eliminates the need for a high-resolution analog-to-digital converter and digital pulse width modulator needed for implementing passive current sharing in a digital controller. Fabricated in a 65nm CMOS process, the prototype multi-phase buck converter occupies an active area of 0.32mm^2, of which the controller occupies only 0.04mm^2. The converter operates over a wide range of switching frequencies (30-70 MHz) and regulates output to any desired voltage in the range of 0.6V to 1.5V from 1.8V input voltage. With a 400mA step in the load current, the settling time is less than 0.6us and the measured duty-cycle mismatch is less than 0.48%. Better than 87% peak efficiency is achieved while consuming a quiescent current of only 3uA/MHz. Finally, light load operation is discussed. The light load efficiency of a time-based buck converter is improved by adding proposed PFM control. At the same time, the proposed seamless transition techniques provide a freedom to change the control mode between PFM and PWM without deteriorating output voltage which allows for a system to manage its power efficiently. Fabricated in a 65nm CMOS, the prototype achieves 90% peak efficiency and > 80% efficiency over an ILOAD range of 2mA to 800mA. VO changes by less than 40mV during PWM to PFM transitions

Reducing Power Loss, Cost and Complexity of SoC Power Delivery Using Integrated 3-Level Voltage Regulators

Traditional methods of system-on-chip (SoC) power management based on dynamic voltage and frequency scaling (DVFS) is limited by 1) cores/IP blocks sharing a voltage domain provided by off-chip voltage regulators (VR) and 2) slow voltage scaling time $(<0.1V/\mu s)$. This global, slow DVFS cannot track the increasingly heterogeneous, fluctuating performance requirements of individual microprocessor cores and SoC components. Furthermore, traditional off-chip VRs add significant area overhead and component cost on the board. This thesis explores replacing a large portion of existing off-chip VRs with integrated voltage regulators (IVR) that can scale the voltage at a 50 mV/ns rate, which is 500 times faster than microsecond-scale voltage scaling with existing off-chip VRs. IVRs occupy 10 times smaller footprint than off-chip VRs, making it easy to duplicate them to provide per-core or per-IP-block voltage control. This thesis starts by summarizing the benefits of using IVRs to deliver power to SoCs. Based on a simulation study targeting a 1.6W, 4-core SoC, I show that greater than 20% energy savings is possible with fast, per-core DVFS enabled by IVRs. Next, I present two stand-alone IVR test-chips converting 1.8V and 2.4V to 0.4-1.4V while delivering maximum 1W to the output. Both test-chips incorporate a 3-level VR topology, which is suitable for integration because the topology allows for much smaller inductors (1nH) than existing inductor-based buck VRs. I also discuss reasons behind lower-than-simulated efficiencies in the test-chips and ways to improve. Finally, I conclude with future process technologies that can boost IVR conversion efficiencies and power densities.Engineering and Applied Science

An Overview of Fully Integrated Switching Power Converters Based on Switched-Capacitor versus Inductive Approach and Their Advanced Control Aspects

This paper reviews and discusses the state of the art of integrated switched-capacitor and integrated inductive power converters and provides a perspective on progress towards the realization of efficient and fully integrated DC–DC power conversion. A comparative assessment has been presented to review the salient features in the utilization of transistor technology between the switched-capacitor and switched inductor converter-based approaches. First, applications that drive the need for integrated switching power converters are introduced, and further implementation issues to be addressed also are discussed. Second, different control and modulation strategies applied to integrated switched-capacitor (voltage conversion ratio control, duty cycle control, switching frequency modulation, Ron modulation, and series low drop out) and inductive converters (pulse width modulation and pulse frequency modulation) are then discussed. Finally, a complete set of integrated power converters are related in terms of their conditions and operation metrics, thereby allowing a categorization to provide the suitability of converter technologies

Design of a hysteresis predictive control strategy with engineering application cases

Aplicat embargament des de la data de defensa fins al 31 de juliol de 2022This doctoral thesis exposes the development of a redesigned Predictive Control strategy that uses hysteresis to improve the performance of the controlled systems in different fields of application. The approach may use one of the three hysteresis models presented in this thesis. Moreover, the hysteresis may be used as a modulation stage or as a reference trajectory generator. The first step in the methodology of this research will be to validate the hysteresis dynamic model that will be used within the control scheme. Due to the three exposed hysteresis models have the same constitution , it is assumed that the test of one is enough to guarantee the validation of the other two hysteresis systems. This validation consists on implementing the hysteresis model in an experimental platform to confirm that the model is indeed feasible. Later, it will be seen that this application is within the scope of renewable energies. Once the hysteresis model is validated, the proposed strategy is developed. This is an Adaptive-Predictive control scheme with a modulation stage for the control signal. This stage employs hysteresis to improve the functioning of the adaptive phase and in general the entire closed-loop performance. lt will be shown how the use of this modulation scenario salves the parametric drift problem commonly present in some adaptive based controlled systems. Additionally, a fault detection system within the Adaptive-Predictive control scheme is also proposed and validated through a numerical simulation. Furthermore, it will be seen how the hysteresis also can be used as a model to generate the reference trajectory needed to accomplish the control objective. Finally, the proposed strategy is implemented in a varied set of control systems to validate it. These control systems are: a nonlinear Van der Poi oscillator, a nonlinear base-isolated system, a DC-DC buck converter, and a single-phase inverter.Esta tesis doctoral expone el desarrollo de una estrategia de Control Predictivo rediseñada que utiliza histéresis para mejorar el rendimiento de los sistemas controlados en diferentes campos de aplicación. Este esquema de control puede utilizar uno de los tres sistemas de histéresis presentados en esta tesis. Además, la histéresis se puede utilizar como etapa de modulación o como generador de trayectorias de referencia. El primer paso en la metodología de esta investigación será validar el modelo dinámico de histéresis que se utilizará dentro del esquema de control. Debido a que los tres modelos de histéresis expuestos tienen la misma constitución, se asume que la prueba de uno es suficiente para garantizar la validación de los otros dos modelos de histéresis. Esta validación consiste en implementar el modelo de histéresis en una plataforma experimental para confirmar que este es realmente factible. Posteriormente, se verá que esta aplicación está dentro del ámbito de las energias renovables. Una vez validado el modelo de histéresis, se desarrolla la estrategia propuesta. Es decir, un esquema de control Adaptativo-Predictivo con una etapa de modulación para la señal de control. Esta etapa emplea histéresis para mejorar el funcionamiento de la fase adaptativa y, en general, de todo el rendimiento del sistema en lazo cerrado. Se mostrará cómo el uso de este etapa de modulación resuelve el problema de la deriva paramétrica comúnmente presente en algunos sistemas basados en control adaptativo. Adicionalmente, también se propone y valida un sistema de detección de fallos dentro del esquema de control Adaptativo-Predictivo mediante una simulación numérica. Además, se verá cómo la histéresis también se puede utilitzar como modelo para generar la trayectoria de referencia necesaria para lograr el objetivo de control. Finalmente, la estrategia propuesta se implementa en un conjunto variado de sistemas de control para validarla. Estos sistemes de control son: un oscilador Van der Poi no lineal, un sistema no lineal de base aisladora, un convertidor Buck DC-DC y un inversor monofásico.Postprint (published version

Design and Control of Power Converters 2019

In this book, 20 papers focused on different fields of power electronics are gathered. Approximately half of the papers are focused on different control issues and techniques, ranging from the computer-aided design of digital compensators to more specific approaches such as fuzzy or sliding control techniques. The rest of the papers are focused on the design of novel topologies. The fields in which these controls and topologies are applied are varied: MMCs, photovoltaic systems, supercapacitors and traction systems, LEDs, wireless power transfer, etc