Voltage controlled oscillator for mm-wave radio systems

Abstract. The advancement in silicon technology has accelerated the development of integrated millimeter-wave transceiver systems operating up to 100 GHz with sophisticated functionality at a reduced consumer cost. Due to the progress in the field of signal processing, frequency modulated continuous wave (FMCW) radar has become common in recent years. A high-performance local oscillator (LO) is required to generate reference signals utilized in these millimeter-wave radar transceivers. To accomplish this, novel design techniques in fundamental voltage controlled oscillators (VCO) are necessary to achieve low phase noise, wide frequency tuning range, and good power efficiency. Although integrated VCOs have been studied for decades, as we move higher in the radio frequency spectrum, there are new trade-offs in the performance parameters that require further characterization. The work described in this thesis aims to design a fully integrated fundamental VCO targeting to 150 GHz, i.e., D-Band. The purpose is to observe and analyze the design limitations at these high frequencies and their corresponding trade-offs during the design procedure. The topology selected for this study is the cross-coupled LC tank VCO. For the study, two design topologies were considered: a conventional cross-coupled LC tank VCO and an inductive divider cross-coupled LC tank VCO. The conventional LC tank VCO yields better performance in terms of phase noise and tuning range. It is observed that the VCO is highly sensitive to parasitic contributions by the transistors, and the layout interconnects, thus limiting the targeted frequency range. The dimensions of the LC tank and the transistors are selected carefully. Moreover, the VCO performance is limited by the low Q factor of the LC tank governed by the varactor that is degrading the phase noise performance and the tuning range, respectively. The output buffer loaded capacitance and the core power consumption of the VCO are optimized. The layout is drawn carefully with strategies to minimize the parasitic effects. Considering all the design challenges, a 126 GHz VCO with a tuning range of 3.9% is designed. It achieves FOMT (Figure-of-merit) of -172 dBc/Hz, and phase noise of -99.14 dBc/Hz at 10 MHz offset, Core power consumption is 8.9 mW from a 1.2 V supply. Just falling short of the targeted frequency, the design is suitable for FMCW radar applications for future technologies. The design was done using Silicon-on-Insulator (SOI) CMOS technology

Radiation Tolerant Electronics, Volume II

Research on radiation tolerant electronics has increased rapidly over the last few years, resulting in many interesting approaches to model radiation effects and design radiation hardened integrated circuits and embedded systems. This research is strongly driven by the growing need for radiation hardened electronics for space applications, high-energy physics experiments such as those on the large hadron collider at CERN, and many terrestrial nuclear applications, including nuclear energy and safety management. With the progressive scaling of integrated circuit technologies and the growing complexity of electronic systems, their ionizing radiation susceptibility has raised many exciting challenges, which are expected to drive research in the coming decade.After the success of the first Special Issue on Radiation Tolerant Electronics, the current Special Issue features thirteen articles highlighting recent breakthroughs in radiation tolerant integrated circuit design, fault tolerance in FPGAs, radiation effects in semiconductor materials and advanced IC technologies and modelling of radiation effects

Realization of analog signal processing modules using carbon nanotube field effect transistors

This thesis presents the realization and performance analysis of several carbon nanotube field effect transistor (CNTFET) based analog signal processing (ASP) modules. CNTFET is predicted as a possible successor to conventional silicon complementary metal oxide semiconductor (CMOS), which has reached its scaling limits. The CMOS based ASP modules face significant challenges at deep nanoscale, resulting in severe performance degradations due to short channel effects. The main goal of this work is to realize CNTFET active building blocks (ABBs), and then to utilize these ABBs for realization of low-voltage, low-power, and high-frequency ASP modules. The proposed ABBs have low power dissipation, reduced parasitic components, and minimum number of CNTFETs. The proposed modules are active inductor (AI), first-order phase shifter, and second-order phase shifter. This research proposes a new CNTFET based grounded AI (GAI) circuit with high self-resonance frequency (SRF), wide tunable inductance range, and high quality factor. Simulation results demonstrate that the GAI offers tunable inductance from 4.4 nH to 287.4 nH with a maximum SRF of 101 GHz. It consumes very low power dissipation of 0.337 mW. In comparison to high performance available GAI circuits, the proposed GAI shows 34% reduction in power dissipation and nine times higher SRF. A highfrequency low-noise amplifier (LNA) circuit is also designed by utilizing the proposed GAI to showcase its application. The simulation result shows high frequency bandwidth of 17.5 GHz to 57 GHz, 15.9 dB maximum voltage gain, better than -10 dB input matching, and less than 3 dB noise figure. This research also proposes a compact wideband first-order phase shifter (FOPS) and active-only FOPS (AOFOPS). Simulation results demonstrate the FOPS has a tunable pole frequency range between 1.913 GHz and 40.2 GHz, input and output voltage noises of 4.402 nV/VHz and 4.414 nV/VH z respectively, and power dissipation of 0.4862 mW. The AOFOPS circuit also offers a wide tunable range of pole frequency between 34.2 GHz to 56.4 GHz with input noise and output noise of 6.822 nV/VHz and 6.761 nV/VHz respectively, and power dissipation of only 0.0338 mW. The AOFOPS dissipates 12.40 times less power in comparison to state-of-art FOPS circuits. This work also proposes active-only second-order phase shifter. The proposed circuit provides a tunable pole frequency between 16.2 GHz to 42.5 GHz, with input and output noises of 21.698 nV/VHz and 21.593 nV/VHz respectively, while consuming 0.2256 mW power. All circuit performances are verified through HSPICE simulation by utilizing the Stanford CNTFET model at 16 nm technology node with supply voltage of 0.7 V

準ミリ波・ミリ波領域における低位相雑音電圧制御発振器のLC共振器に関する研究

2017岡山県立大学大学

Development of Tunable RF Integrated Passive Devices

Radio frequency (RF) lumped elements are crucial building blocks for designing any type of passives circuits for RF front-end applications in mobile devices. In particular, high-quality (Q) factor lumped elements are desirable for improving both insertion loss and noise performance. Integrated passive devices (IPD) technology is a platform that can provide miniature inductors, and capacitors with high- Q values that are unattainable with traditional CMOS technologies. Over the past several years, IPD technology has been used to implement devices such as filters, couplers and impedance-matching networks for a wide range of system-in-package applications. However, most of the IPD circuits do not yet have any tunable/reconfigurable functions for use in frequency agile applications. The objective of this research is to develop tunable integrated passive devices (IPDs) using barium strontium titanate (BST) and micro-electrical-mechanical-systems (MEMS) technologies. Another objective is to develop a fabrication process for monolithic integration of MEMS switches and IPD devices. A 4-mask IPD glass/alumina-based fabrication process is developed at the University of Waterloo for the first time. Details of the modeling and characterization of high-Q lumped elements, L and C, are investigated. The RF performance of these elements is compared with that of similar designs fabricated in a commercial IPD foundry. To highlight the benefits of the IPD process, lumped element bandpass filters are designed, fabricated, and tested. BST varactors are integrated with IPD circuits to demonstrate a highly miniaturized tunable impedance matching network featuring a wide impedance coverage from 2-3 GHz and an insertion loss of approximately 1 dB. The network promises to be useful in a broad range of wireless applications. A high performance tunable IPD/BST bandstop filter with a wideband balun as a multichip module is also proposed. Reconfigurable IPD/BST bandpass filters with tunable transmission zeros are presented and investigated experimentally for operation under high power levels. Intermodulation test results are presented for the integrated IPD/BST devices. Making use of the fact that the IPD fabrication process is amenable to the realization of MEMS devices, the IPD process originally developed for realizing passive circuits is further expanded to accommodate monolithic integration of MEMS switches with IPD circuits. Contact-type MEMS switches are developed, fabricated and tested. Also, a monolithically integrated IPD/MEMS 3-bit high resolution true-time delay network and high-Q switched-capacitor bank are fabricated and tested to demonstrate the benefits of integrating MEMS technology with the IPD technology