142 research outputs found

    Wake-Up Oscillators with pW Power Consumption in Dynamic Leakage Suppression Logic

    Get PDF
    In this paper, two circuit topologies of pW-power Hz-range wake-up oscillators for sensor node applications are presented. The proposed circuits are based on standard cells utilizing the Dynamic Leakage Suppression logic style [4]-[5]. The proposed oscillators exhibit low supply voltage sensitivity over a wide supply voltage range, from nominal voltage down to the deep sub-threshold region (i.e., 0.3V). This enables direct powering from energy harvesters or batteries through their whole discharge cycle, suppressing the need for voltage regulation. Post-layout time-domain simulations of the proposed oscillators in 180nm show a power consumption of 1.4-1.7pW, a supply-sensitivity of 55-40%/V over the 0.3V-1.8V supply voltage range, and a compact area down to 1,500μm2. The very low power consumption makes the proposed circuits very well suited for energy-harvested systems-on-chip for Internet of Things applications

    Ultra-low Power Circuits for Internet of Things (IOT)

    Full text link
    Miniaturized sensor nodes offer an unprecedented opportunity for the semiconductor industry which led to a rapid development of the application space: the Internet of Things (IoT). IoT is a global infrastructure that interconnects physical and virtual things which have the potential to dramatically improve people's daily lives. One of key aspect that makes IoT special is that the internet is expanding into places that has been ever reachable as device form factor continue to decreases. Extremely small sensors can be placed on plants, animals, humans, and geologic features, and connected to the Internet. Several challenges, however, exist that could possibly slow the development of IoT. In this thesis, several circuit techniques as well as system level optimizations to meet the challenging power/energy requirement for the IoT design space are described. First, a fully-integrated temperature sensor for battery-operated, ultra-low power microsystems is presented. Sensor operation is based on temperature independent/dependent current sources that are used with oscillators and counters to generate a digital temperature code. Second, an ultra-low power oscillator designed for wake-up timers in compact wireless sensors is presented. The proposed topology separates the continuous comparator from the oscillation path and activates it only for short period when it is required. As a result, both low power tracking and generation of precise wake-up signal is made possible. Third, an 8-bit sub-ranging SAR ADC for biomedical applications is discussed that takes an advantage of signal characteristics. ADC uses a moving window and stores the previous MSBs voltage value on a series capacitor to achieve energy saving compared to a conventional approach while maintaining its accuracy. Finally, an ultra-low power acoustic sensing and object recognition microsystem that uses frequency domain feature extraction and classification is presented. By introducing ultra-low 8-bit SAR-ADC with 50fF input capacitance, power consumption of the frontend amplifier has been reduced to single digit nW-level. Also, serialized discrete Fourier transform (DFT) feature extraction is proposed in a digital back-end, replacing a high-power/area-consuming conventional FFT.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137157/1/seojeong_1.pd

    Design and performance analysis of a twin T-bridge RC harmonic oscillation generator with an operational amplifier

    Get PDF
    This paper presents the special features of harmonic generators and their widespread use and in particular the design, simulation and experimental studies of a twin T-bridge RC generator with an operational amplifier. The results obtained are analyzed and compared. For the particular implementation, the frequency error varies from 4 % in experimental studies to 6.7 % in the simulation, and in this case an average value of 5.35 % can be assumed

    A pW-Power Hz-Range Oscillator Operating With a 0.3-1.8-V Unregulated Supply

    Get PDF
    In this paper, a pW-power relaxation oscillator for sensor node applications is presented. The proposed oscillator operates over a wide supply voltage range from nominal down to deep sub-threshold and requires only a sub-pF capacitor for Hz-range output frequency. A true pW-power operation is enabled thanks to the adoption of an architecture leveraging transistor operation in super-cutoff, the elimination of voltage regulation, and current reference. Indeed, the oscillator can be powered directly from highly variable voltage sources (e.g., harvesters and batteries over their whole charge/discharge cycle). This is achieved thanks to the wide supply voltage range, the low voltage sensitivity of the output frequency and the current drawn from the supply. A test chip of the proposed oscillator in 180 nm exhibits a nominal frequency of approximately 4 Hz, a supply voltage range from 1.8 V down to 0.3 V with 10%/V supply sensitivity, 8-18-pA current absorption, and 4%/°C thermal drift from -20 °C to 40 °C at an area of 1600 μm². To the best of the authors' knowledge, the proposed oscillator is the only one able to operate from sub-threshold to nominal voltage

    Digital ADCs and ultra-wideband RF circuits for energy constrained wireless applications by Denis Clarke Daly.

    Get PDF
    Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.Cataloged from PDF version of thesis.Includes bibliographical references (p. 173-183).Ongoing advances in semiconductor technology have enabled a multitude of portable, low power devices like cellular phones and wireless sensors. Most recently, as transistor device geometries reach the nanometer scale, transistor characteristics have changed so dramatically that many traditional circuits and architectures are no longer optimal and/or feasible. As a solution, much research has focused on developing 'highly digital' circuits and architectures that are tolerant of the increased leakage, variation and degraded voltage headrooms associated with advanced CMOS processes. This thesis presents several highly digital, mixed-signal circuits and architectures designed for energy constrained wireless applications. First, as a case study, a highly digital, voltage scalable flash ADC is presented. The flash ADC, implemented in 0.18 [mu]m CMOS, leverages redundancy and calibration to achieve robust operation at supply voltages from 0.2 V to 0.9 V. Next, the thesis expands in scope to describe a pulsed, noncoherent ultra-wideband transceiver chipset, implemented in 90 nm CMOS and operating in the 3-to-5 GHz band. The all-digital transmitter employs capacitive combining and pulse shaping in the power amplifier to meet the FCC spectral mask without any off-chip filters. The noncoherent receiver system-on-chip achieves both energy efficiency and high performance by employing simple amplifier and ADC structures combined with extensive digital calibration. Finally, the transceiver chipset is integrated in a complete system for wireless insect flight control.(cont.) Through the use of a flexible PCB and 3D die stacking, the total weight of the electronics is kept to 1 g, within the carrying capacity of an adult Manduca sexta moth. Preliminary wireless flight control of a moth in a wind tunnel is demonstrated.Ph.D

    RF TRANSCEIVER DESIGN FOR WIRELESS SENSOR NETWORKS

    Get PDF
    Ph.DDOCTOR OF PHILOSOPH

    Low Power Circuits for Miniature Sensor Systems.

    Full text link
    With the development of VLSI technologies, the sensor systems of all kinds of applications have entered our everyday's life. For specific applications such as medical implants, the form factor of such systems is the crucial concern. In order to minimize of size of the power sources with a given lifetime, the ability to operate the system with low power consumption is the key. An effective way of lowering the active power dissipation is through aggressive voltage scaling. For minimal energy operation, the optimum supply voltage is typical lower than the subthreshold voltage. On the other hand, a sensor system spends most of the time idling while only actively obtaining data in a short period of time. As a result, strong power gating is needed for reducing the leakage power. We discuss the design challenges for several building blocks for the sensor system that have not been gotten much emphasis in term of power consumption. To monitor the period for idle time and to wake up the system periodically, two types of ultra low power timers are proposed. The first one utilizes the gate leakage of a MOS transistor to achieve low temperature dependency and large time constant. The second one implements a program-and-hold technique to compensate for the temperature coefficient of a one-shot oscillator with 150pW of average power. We propose a low power temperature sensor that is suitable for passive RFID transponder. To retrieve the data out of the sensor chip, two passive proximity communication schemes are presented. Capacitive coupling can be used for chips on a stack where the key challenge is misalignment. A alignment detection and microplate reconfiguration method is proposed to solve the problem. We also propose a passive inductive coupling scheme using pulse signaling. Compared to the traditional backscattering technique, the limitations on the quality factor of the inductor and the signal sensitivity of the receiver can be relaxed.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/61782/1/yushiang_1.pd

    Digital-Based Analog Processing in Nanoscale CMOS ICs for IoT Applications

    Get PDF
    L'abstract è presente nell'allegato / the abstract is in the attachmen
    corecore