1.5V fully programmable CMOS Membership Function Generator Circuit with proportional DC-voltage control

A Membership Function Generator Circuit (MFGC) with bias supply of 1.5 Volts and independent DC-voltage programmable functionalities is presented. The realization is based on a programmable differential current mirror and three compact voltage-to-current converters, allowing continuous and quasi-linear adjustment of the center position, height, width and slopes of the triangular/trapezoidal output waveforms. HSPICE simulation results of the proposed circuit using the parameters of a double-poly, three metal layers, 0.5 μm CMOS technology validate the functionality of the proposed architecture, which exhibits a maximum deviation of the linearity in the programmability of 7 %

A genetic algorithm for the design of a fuzzy controller for active queue management

Active queue management (AQM) policies are those policies of router queue management that allow for the detection of network congestion, the notification of such occurrences to the hosts on the network borders, and the adoption of a suitable control policy. This paper proposes the adoption of a fuzzy proportional integral (FPI) controller as an active queue manager for Internet routers. The analytical design of the proposed FPI controller is carried out in analogy with a proportional integral (PI) controller, which recently has been proposed for AQM. A genetic algorithm is proposed for tuning of the FPI controller parameters with respect to optimal disturbance rejection. In the paper the FPI controller design metodology is described and the results of the comparison with random early detection (RED), tail drop, and PI controller are presented

A 5.26 Mflips Programmable Analogue Fuzzy Logic Controller in a Standard CMOS 2.4 microns Technology

A complete digitally - programmable analogue Fuzzy Logic Controller (FLC) is presented. The design of some new functional blocks and the improvement of others aim towards speed optimisation with a reasonable accuracy, as it is needed in several analogue Signal Processing applications. A nine-rules, two-inputs and one-output prototype was fabricated and successfully tested using a standard CMOS 2.4microns technology showing good agreement with the expected performances, namely: 5.26 Mflips (Mega fuzzy logic inferences per second) at the pin terminals (@CL=13pF), 933 @W power consumption per rule (@Vdd=5V) and 5 to 6 bits of precision. Since the circuit is intended for a subsystem embedded in an application chip (@CL ≤@5pF) over 8 Mflips may be expected

A 5.26 Mflips programmable analogue fuzzy logic controller in a standard CMOS 2.4 /spl mu/ technology

A complete digitally - programmable analogue Fuzzy Logic Controller (FLC) is presented. The design of some new functional blocks and the improvement of others aim towards speed optimization with a reasonable accuracy, as it is needed in several analogue Signal Processing applications. A nine-rules, two-inputs and one-output prototype was fabricated and successfully tested using a standard CMOS 2.4 μ technology showing good agreement with the expected performances, namely: 5.26 Mflips (Mega fuzzy logic inferences per second) at the pin terminals (CL = 13 pF), 933 μW power consumption per rule (Vdd = 5 V) and 5 to 6 bits of precision. Since the circuit is intended for a subsystem embedded in an application chip (CL≤5 pF) over 8 Mflips may be expected.Fil: Dualibe, Fortunato Carlos Augusto. Universidad Católica de Córdoba. Facultad de Ingeniería; ArgentinaFil: Jespers, Paul. Universidad Católica de Córdoba. Facultad de Ingeniería; ArgentinaFil: Verleysen, Michel. Universidad Católica de Córdoba. Facultad de Ingeniería; Argentin