40 research outputs found
A Low-Power BFSK/OOK Transmitter for Wireless Sensors
In recent years, significant improvements in semiconductor technology have allowed consistent development of wireless chipsets in terms of functionality and form factor. This has opened up a broad range of applications for implantable wireless sensors and telemetry devices in multiple categories, such as military, industrial, and medical uses. The nature of these applications often requires the wireless sensors to be low-weight and energy-efficient to achieve long battery life. Among the various functions of these sensors, the communication block, used to transmit the gathered data, is typically the most power-hungry block. In typical wireless sensor networks, transmission range is below 10 meters and required radiated power is below 1 milliwatt. In such cases, power consumption of the frequency-synthesis circuits prior to the power amplifier of the transmitter becomes significant. Reducing this power consumption is currently the focus of various research endeavors. A popular method of achieving this goal is using a direct-modulation transmitter where the generated carrier is directly modulated with baseband data using simple modulation schemes.
Among the different variations of direct-modulation transmitters, transmitters using unlocked digitally-controlled oscillators and transmitters with injection or resonator-locked oscillators are widely investigated because of their simple structure. These transmitters can achieve low-power and stable operation either with the help of recalibration or by sacrificing tuning capability. In contrast, phase-locked-loop-based (PLL) transmitters are less researched. The PLL uses a feedback loop to lock the carrier to a reference frequency with a programmable ratio and thus achieves good frequency stability and convenient tunability.
This work focuses on PLL-based transmitters. The initial goal of this work is to reduce the power consumption of the oscillator and frequency divider, the two most power-consuming blocks in a PLL. Novel topologies for these two blocks are proposed which achieve ultra-low-power operation. Along with measured performance, mathematical analysis to derive rule-of-thumb design approaches are presented. Finally, the full transmitter is implemented using these blocks in a 130 nanometer CMOS process and is successfully tested for low-power operation
Low Power Adaptive Circuits: An Adaptive Log Domain Filter and A Low Power Temperature Insensitive Oscillator Applied in Smart Dust Radio
This dissertation focuses on exploring two low power adaptive circuits. One is an adaptive filter at audio frequency for system identification. The other is a temperature insensitive oscillator for low power radio frequency communication.
The adaptive filter is presented with integrated learning rules for model reference estimation. The system is a first order low pass filter with two parameters: gain and cut-off frequency. It is implemented using multiple input floating gate transistors to realize online learning of system parameters. Adaptive dynamical system theory is used to derive robust control laws in a system identification task. Simulation results show that convergence is slower using simplified control laws but still occurs within milliseconds. Experimental results confirm that the estimated gain and cut-off frequency track the corresponding parameters of the reference filter. During operation, deterministic errors are introduced by mismatch within the analog circuit implementation. An analysis is presented which attributes the errors to current mirror mismatch. The harmonic distortion of the filter operating in different inversion is analyzed using EKV model numerically.
The temperature insensitive oscillator is designed for a low power wireless network. The system is based on a current starved ring oscillator implemented using CMOS transistors instead of LC tank for less chip area and power consumption. The frequency variance with temperature is compensated by the temperature adaptive circuits. Experimental results show that the frequency stability from 5°C to 65°C has been improved 10 times with automatic compensation and at least 1 order less power is consumed than published competitors. This oscillator is applied in a 2.2GHz OOK transmitter and a 2.2GHz phase locked loop based FM receiver.
With the increasing needs of compact antenna, possible high data rate and wide unused frequency range of short distance communication, a higher frequency phase locked loop used for BFSK receiver is explored using an LC oscillator for its capability at 20GHz. The success of frequency demodulation is demonstrated in the simulation results that the PLL can lock in 0.5μs with 35MHz lock-in range and 2MHz detection resolution. The model of a phase locked loop used for BFSK receiver is analyzed using Matlab
Low-Power High Data-Rate Wireless Transmitter For Medical Implantable Devices
RÉSUMÉ Les émetteurs-récepteurs radiofréquences (RF) sont les circuits de communication les plus communs pour établir des interfaces home-machine dédiées aux dispositifs médicaux implantables. Par exemple, la surveillance continue de paramètres de santé des patients souffrant d'épilepsie nécessite un étage de communication sans-fil capable de garantir un transfert de données rapide, en temps réel, à faible puissance tout en étant implémenté dans un faible volume. La consommation de puissance des dispositifs implantables implique une durée de vie limitée de la batterie qui nécessite alors une chirurgie pour son remplacement, a moins qu’une technique de transfert de puissance sans-fil soit utilisée pour recharger la batterie ou alimenter l’implant a travers les tissus humains.
Dans ce projet, nous avons conçu, implémenté et testé un émetteur RF à faible puissance et haut-débit de données opérant à 902-928 MHz de la bande fréquentielle industrielle-scientifique-médicale (ISM) d’Amérique du Nord. Cet émetteur fait partie d'un système de communication bidirectionnel dédié à l’interface sans-fil des dispositifs électroniques implantables et mettables et bénéficie d’une nouvelle approche de
modulation par déplacement de fréquence (FSK). Les différentes étapes de conception et d’implémentation de l'architecture proposée pour l'émetteur sont discutées et analysées dans cette thèse. Les blocs de circuits sont réalisés suivant les équations dérivées de la modulation FSK proposée et qui mènera à l'amélioration du débit de données et de la consommation d'énergie. Chaque bloc est implémenté de manière à ce que la consommation d'énergie et la surface de silicium nécessaires soient réduites. L’étage de modulation et le circuit mélangeur ne nécessitent aucun courant continu grâce à leur structure passive.Parmi les circuits originaux, un oscillateur en quadrature contrôlé-en-tension (QVCO) de faible puissance est réalisé pour générer des signaux différentiels en quadrature, rail-à-rail avec deux gammes de fréquences principales de 0.3 à 11.5 MHz et de 3 à 40 MHz. L'étage de sortie énergivore est également amélioré et optimisé pour atteindre une efficacité de puissance de ~ 37%. L'émetteur proposé a été implémenté et fabriqué à la suite de simulations post-layout approfondies.----------ABSTRACT
Wireless radio frequency (RF) transceivers are the most common communication front-ends used to realize the human-machine interfaces of medical devices. Continuous monitoring of body behaviour of patients suffering from Epilepsy, for example, requires a wireless communication front-end capable of maintaining a fast, real-time and low-power data communication while implemented in small size. Power budget limitation of the implantable and wearable medical devices obliges engineers to replace or recharge the battery cell through frequent medial surgeries or other power transfer techniques. In this project, a low-power and high data-rate RF transmitter (Tx) operating at North-American Industrial-Scientific-Medical (ISM) frequency band (902-928 MHz) is designed, implemented and tested. This transmitter is a part of a bi-directional transceiver dedicated to the wireless interface of implantable and wearable medical devices and benefits from a new efficient Frequency-Shift Keying (FSK) modulation scheme. Different design and implementation stages of the proposed transmitter architecture are discussed and analyzed in this thesis. The building blocks are realized according to the equations derived from the proposed FSK modulation, which results in improvement in data-rate and power consumption. Each block is implemented such that the power consumption and needed chip area are lowered while the modulation block and the mixer circuit require no DC current due to their passive structure. Among the original blocks, a low-power quadrature voltage-controlled oscillator (QVCO) is achieved to provide differential quadrature rail-to-rail signals with two main frequency ranges of 0.3-11.5 MHz and 3-40 MHz. The power-hungry output stage is also improved and optimized to achieve power efficiency of ~37%. The proposed transmitter was implemented and fabricated following deep characterisation by post-layout simulation. Both simulation and measurement results are discussed and compared with state-of-the-art transmitters showing the contribution of this work in this very popular research field. The Figure-Of-Merit (FOM) was improved, meaning mainly increasing the data-rate and lowering the power consumption of the circuit. The transmitter is implemented using 130 nm CMOS technology with 1.2 V supply voltage. A data-rate of 8 Mb/s was measured while consuming 1.4 mA and resulting in energy consumption of 0.21 nJ/b. The fabricated transmitter has small active silicon area of less than 0.25 mm2
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Low power receivers for wireless sensor networks
Wireless sensor networks are becoming important in several monitoring and sensing applications. Ultra low power consumption in the sensor nodes is important for extending the battery life of the nodes. In this dissertation, two low power BFSK receiver architectures are proposed and verified with prototype implementations in silicion.
A 2.4 GHz 1 Mb/s polyphase filter (PPF) BFSK receiver demonstrates ±180 ppm frequency offset tolerance (FOT) and 40 dB adjacent channel rejection (ACR) at a modulation index (MI) of 2, with a power consumption of 1.9 mW. High FOT at low MI is achieved by a frequency-to-energy conversion architecture using PPFs without any frequency correction. The proposed hybrid topology of the PPF provides an improved ACR at reduced power.
To further improve the energy efficiency, a low energy 900 MHz mixer-less BFSK receiver is designed. High gain frequency-to-amplitude conversion and better sensitivity is achieved by a linear amplifier with Q-enhanced LC tank, eliminating the need for local oscillators and mixers. With a power consumption of 500 μW, the receiver achieves sensitivities of -90 dBm and -76 dBm for data rates of 0.5 Mb/s and 6 Mb/s, respectively. The energy efficiency is 80 pJ/b when operating at 6 Mb/s
Low power CMOS IC, biosensor and wireless power transfer techniques for wireless sensor network application
The emerging field of wireless sensor network (WSN) is receiving great attention due to the interest in healthcare. Traditional battery-powered devices suffer from large size, weight and secondary replacement surgery after the battery life-time which is often not desired, especially for an implantable application. Thus an energy harvesting method needs to be investigated. In addition to energy harvesting, the sensor network needs to be low power to extend the wireless power transfer distance and meet the regulation on RF power exposed to human tissue (specific absorption ratio). Also, miniature sensor integration is another challenge since most of the commercial sensors have rigid form or have a bulky size. The objective of this thesis is to provide solutions to the aforementioned challenges
Low-Power High-Data-Rate Transmitter Design for Biomedical Application
Ph.DDOCTOR OF PHILOSOPH
Co-simulation of RFIC with bondwire antenna via retarded PEEC method
We present an antenna modeling method based on partial element equivalent circuit (PEEC) theory. The antenna is modeled as an equivalent circuit of lumped circuit elements, which enables circuit co-simulation between the antenna and circuits in both time and frequency domains. Antenna radiation is captured as an equivalent radiation resistor. For verification, a 2.4-GHz transmitter with bondwire antenna was implemented in a standard digital 0.35μm CMOS technology. Measurement shows good agreement with the proposed model. This model can be applied to any other on-chip electromagnetic structures. © 2012 IEEE.published_or_final_versio
Récepteur Sans-Fil à Basse Consommation et à Modulation Mixte FSK-ASK pour les Dispositifs Médicaux
RÉSUMÉ Les émetteurs-récepteurs radiofréquences (RF) offrent le lien de communications le plus commun
afin de mettre au point des dispositifs médicaux implantables dédiés aux interfaces homme-machines. La surveillance en continu des paramètres biologiques des patients nécessite un module de communication sans-fil capable de garantir un échange de données rapide,
en temps réel, à faible puissance tout en étant implémenté dans un espace physique réduit. La consommation de puissance des dispositifs implantables joue un rôle important dans les durées de vie des batteries qui nécessitent une chirurgie pour leur remplacement, à moins
qu’une technique de transfert de puissance sans-fil soit utilisée pour recharger la batterie ou alimenter l’implant a travers les tissus humains. Dans ce projet, nous avons conçu, implémenté et testé un récepteur RF à faible puissance et haut-débit de données opérant entre 902 et 928 MHz qui est la bande industrielle-scientifiquemédicale
(Industrial, Scientific and Medical) d’Amérique du Nord. Ce récepteur fait partie d’un système de communication bidirectionnel dédié à l’interface sans-fil des dispositifs électroniques implantables et bénéficie d’une nouvelle technique de conversion de modulation par déplacement de fréquence (FSK) en Modulation par déplacement d’amplitude (ASK). Toutes les phases de conception et d’implémentation de la topologie adoptée pour les récepteurs RF
sont survolées et discutées dans cette thèse. Les différents étages de circuits sont conçus selon
une étude analytique fondée de la modulation FSK et ASK utilisées, ce qui permettra une amélioration des performances notamment le débit de transmission des données et la consommation de puissance. Tous les circuits sont réalisés de façon à ce que la consommation totale et la surface de silicium à réserver soient le minimum possible. Un oscillateur avec verrouillage par injection (Injection-Looked Oscillator - ILO) de faible puissance est réalisé
pour assurer la conversion des signaux ASK en FSK. Une combinaison des avantages des deux architectures de modulation d’amplitude et de fréquence, pour les circuits d’émetteurrécepteur sans fil, a été réalisé avec le système proposé. Un module incluant un récepteur de réveil (Wake up) est ajouté afin d’optimiser la consommation
totale du circuit en mettant tous les blocs à l’arrêt. Nous avons réalisé un récepteur de réveil RF compact et à faible coût, permettant de très faible niveaux de consommation
d’énergie, une bonne sensibilité et une meilleure tolérance aux interférences. Le design est basé sur une topologie homodyne à détection d’enveloppe permettant une transposition directe du signal RF modulé en amplitude en un signal en bande de base. Cette architecture nécessite une architecture peu encombrante à intégrer qui élimine le problème des fréquences image pour la même topologie avec une modulation de fréquence.---------- ABSTRACT
ISM band transceiver using a wake-up bloc for wireless body area networks (WBANs) wearable and implantable medical devices is proposed. The system achieves exceptionally
low-power consumption and allows a high-data rate by combining the advantages of Frequency-Shift-Keying (FSK) and Amplitude-Shift- Keying (ASK) modulation techniques.
The transceiver employs FSK modulation at a data rate of 8 Mbit/s to establish RF link among the medical device and a control unit. Transmitter (Tx) includes a new efficient FSK modulation scheme which offer up to 20 Mb/s of data-rate and dissipates around 0.084 nJ/b. The design of the proposed oscillator achieves variable frequency from 300 kHz to 8 MHz by adjusting the transistors geometry, the on-chip control signal and the tuning capacitors. In the transmitter path, the high-quality LOs Inand Quadrature-phase (I and Q) outputs are produced using a very low-power fully integrated integer-N frequency synthesizer.
The architecture of the receiver is inspired from the super-regenerative receiver (SRR) topology which can be used to design a transceiver that is suitable for ASK modulation. In fact, this architecture is based mainly on envelope detection scheme which remove the need to process the carrier phase to reduce the complexity of integrated design. It has been shown too, that the envelope detection scheme is more robust to phase noise than the coherent
scheme. The integrated receiver uses on a new FSK-to-ASK conversion technique. The conversion feature that we adopt in the main receiver design is based on the fact that the
incident frequency of converter could be differentiated by the amplitude of output signal, which conducts to the frequency-to-amplitude conversion. Thanks to the injection locking oscillator (ILO). the new design of converter is located between the LNA as first part and the envelope detector as second part to benefit from the injection-locking isolation. On-Off-keying (OOK) fully passive wake-up circuit (WuRx) with energy harvesting from Radio
Frequency (RF) link is used to optimize the power issipation of the RF transceiver in order to meet the low power requirement. The WuRx operates at the ISM 902–928 MHz. A high efficiency differential rectifier behaves as voltage multiplier. It generates the envelope of the input signal and provides the supply voltage for the rest of blocks including a low-power comparator and reference generators
Low Power Circuit Design in Sustainable Self Powered Systems for IoT Applications
The Internet-of-Things (IoT) network is being vigorously pushed forward from many fronts in
diverse research communities. Many problems are still there to be solved, and challenges are found
among its many levels of abstraction. In this thesis we give an overview of recent developments
in circuit design for ultra-low power transceivers and energy harvesting management units for the
IoT.
The first part of the dissertation conducts a study of energy harvesting interfaces and optimizing
power extraction, followed by power management for energy storage and supply regulation. we
give an overview of the recent developments in circuit design for ultra-low power management
units, focusing mainly in the architectures and techniques required for energy harvesting from
multiple heterogeneous sources. Three projects are presented in this area to reach a solution that
provides reliable continuous operation for IoT sensor nodes in the presence of one or more natural
energy sources to harvest from.
The second part focuses on wireless transmission, To reduce the power consumption and boost
the Tx energy efficiency, a novel delay cell exploiting current reuse is used in a ring-oscillator
employed as the local oscillator generator scheme. In combination with an edge-combiner power
amplifier, the Tx showed a measured energy efficiency of 0.2 nJ=bit and a normalized energy
efficiency of 3.1 nJ=bit:mW when operating at output power levels up to -10 dBm and data rates
of 3 Mbps
Ultra-low power, low-voltage transmitter at ISM band for short range transceivers
Tezin basılısı İstanbul Şehir Üniversitesi Kütüphanesi'ndedir.The increasing demand for technology to be used in every aspect of our lives has led the way to many new applications and communication standards. WSN and BAN are some of the new examples that utilize electronic circuit design in the form of very small sensors to perform their applications. They consist of small sensor nodes and have applications ranging from entertainment to medicine. Requirements such as decreasing the area and the power consumption help to have longer-lasting batteries and smaller devices. The standard paves the way for the devices from different vendors to communicate with each other, and that motivates us to make designs as compatible with the standard as it can be. In this thesis, an ultra-low power high efficient transmitter with a small area working at 2.4 GHz have been designed for BAN applications. A study on the system-view perspective is important in optimizing the area and power since the transmitter architecture can change the circuit design. From a circuit design perspective, seeking to decrease power consumption means thinking of new techniques to implement the same function or a new system. Inspired by new trends, this research presents a design solution to the previously mentioned problem and hopefully, after fabrication, the measured results will match the simulated results to prove the validity of the design.Declaration of Authorship ii
Abstract iv
Öz v
Acknowledgments vii
List of Figures x
List of Tables xiii
Abbreviations xiv
1 Introduction 1
1.1 Background and Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Communication Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2.1 Digital Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.2 Unwanted Power Limitations . . . . . . . . . . . . . . . . . . . . . 3
1.2.3 Multiple Access Techniques . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Transmitter System Level Specifications . . . . . . . . . . . . . . . . . . . 4
1.3.1 Low Power Wireless Standards . . . . . . . . . . . . . . . . . . . . 4
1.4 Low-Power Wireless Transceiver systems . . . . . . . . . . . . . . . . . . . 6
1.4.1 Survey of the previous work . . . . . . . . . . . . . . . . . . . . . . 7
1.4.2 The Designed Transmitter System . . . . . . . . . . . . . . . . . . 8
1.5 Ultra-Low Power Transmitters Performance Metrics . . . . . . . . . . . . 9
1.6 Thesis Contribution and Outline . . . . . . . . . . . . . . . . . . . . . . . 10
2 Circuit Design for The Transmitter 11
2.1 Technology Characterization and Modeling for Low-Power Designs . . . 11
2.1.1 Passive Components modeling . . . . . . . . . . . . . . . . . . . . 11
2.1.2 Active Components Modeling . . . . . . . . . . . . . . . . . . . . . 13
2.1.3 MOS Transistor Sub-threshold Modeling . . . . . . . . . . . . . . 13
2.1.4 MOS Transistor Simulation-Based Modeling . . . . . . . . . . . . . 14
2.2 Low-Voltage Low-Power Analog and RF Design Principles . . . . . . . . . 17
2.2.1 Separate Gate Biasing of The Inverter . . . . . . . . . . . . . . . . 17
2.2.2 Body Biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3 Low-Voltage Analog Mixed Biasing Circuit Designs . . . . . . . . . . . . . 18
2.3.1 DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3.2 Operational Amplifier Design . . . . . . . . . . . . . . . . . . . . . 19
2.4 Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.4.1 The MEMS Crystal . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.4.2 Crystal Oscillator Topologies . . . . . . . . . . . . . . . . . . . . . 23
2.4.3 Design of The CMOS Crystal Oscillator . . . . . . . . . . . . . . . 26
2.5 Pre-Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.6 OOK Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.7 BPSK Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.8 Digital Control of the Modulators . . . . . . . . . . . . . . . . . . . . . . . 35
2.9 Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.9.1 ULP PA Topologies Survey . . . . . . . . . . . . . . . . . . . . . . 38
2.9.2 The Push-Pull PA Design Methodology . . . . . . . . . . . . . . . 41
2.10 Transmit/Receive (T/R) Switch . . . . . . . . . . . . . . . . . . . . . . . 43
2.10.1 T/R Switch Topologies . . . . . . . . . . . . . . . . . . . . . . . . . 43
2.10.2 Suggested Low-Area Low-Voltage RF Switch . . . . . . . . . . . . 46
3 Transmitter Integration and Final Results 48
3.1 Transmitter Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.2 Transmitter Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.3 Results Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3.4 Results Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
4 Conclusions 59
4.1 Thesis Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
4.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
A Bond Wire Parasitic Modeling 61
B Crystal Oscillator With Parasitic Effects 67
B.1 Simulation of FBAR with Parasitic Effects . . . . . . . . . . . . . . . . . 67
B.2 Root Locus Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Bibliography 7