Field Programmable Gate Array (FPGA) for Bio-Inspired Visuo-Motor Control Systems Applied to Micro-Air Vehicles

International audienc

Asynchronous 3D (Async3D): Design Methodology and Analysis of 3D Asynchronous Circuits

This dissertation focuses on the application of 3D integrated circuit (IC) technology on asynchronous logic paradigms, mainly NULL Convention Logic (NCL) and Multi-Threshold NCL (MTNCL). It presents the Async3D tool flow and library for NCL and MTNCL 3D ICs. It also analyzes NCL and MTNCL circuits in 3D IC. Several FIR filter designs were implement in NCL, MTNCL, and synchronous architecture to compare synchronous and asynchronous circuits in 2D and 3D ICs. The designs were normalized based on performance and several metrics were measured for comparison. Area, interconnect length, power consumption, and power density were compared among NCL, MTNCL, and synchronous designs. The NCL and MTNCL designs showed improvements in all metrics when moving from 2D to 3D. The 3D NCL and MTNCL designs also showed a balanced power distribution in post-layout analysis. This could alleviate the hotspot problem prevalently found in most 3D ICs. NCL and MTNCL have the potential to synergize well with 3D IC technology

Measurements, Models, Systems and Design

531 s.

The 1992 4th NASA SERC Symposium on VLSI Design

Papers from the fourth annual NASA Symposium on VLSI Design, co-sponsored by the IEEE, are presented. Each year this symposium is organized by the NASA Space Engineering Research Center (SERC) at the University of Idaho and is held in conjunction with a quarterly meeting of the NASA Data System Technology Working Group (DSTWG). One task of the DSTWG is to develop new electronic technologies that will meet next generation electronic data system needs. The symposium provides insights into developments in VLSI and digital systems which can be used to increase data systems performance. The NASA SERC is proud to offer, at its fourth symposium on VLSI design, presentations by an outstanding set of individuals from national laboratories, the electronics industry, and universities. These speakers share insights into next generation advances that will serve as a basis for future VLSI design

Palmo : a novel pulsed based signal processing technique for programmable mixed-signal VLSI

In this thesis a new signal processing technique is presented. This technique exploits the use of pulses as the signalling mechanism. This Palmo 1 signalling method applied to signal processing is novel, combining the advantages of both digital and analogue techniques. Pulsed signals are robust, inherently low-power, easily regenerated, and easily distributed across and between chips. The Palmo cells used to perform analogue operations on the pulsed signals are compact, fast, simple and programmable

Continuous Integration for Fast SoC Algorithm Development

Digital systems have become advanced, hard to design and optimize due to ever-growing technology. Integrated Circuits (ICs) have become more complicated due to complex computations in latest technologies. Communication systems such as mobile networks have evolved and become a part of our daily lives with the advancement in technology over the years. Hence, need of efficient, reusable and automated processes for System-on-a-Chip (SoC) development has been increased. Purpose of this thesis is to study and evaluate currently used SoC development processes and presents guidelines on how these processes can be streamlined. The thesis starts by evaluating currently used SoC development flows and their advantages and disadvantages. One important aspect is to identify step which cause duplication of work and unnecessary idle times in SoC development teams. A study is conducted and input from SoC development experts is taken in order to optimize SoC flows and use of Continuous Integration (CI) system. An algorithm model is implemented that can be used in multiple stages of SoC development at adequate complexity and is “easy enough” to be used for a person not mastering the topic. The thesis outcome is proposal for CI system in SoC development for accelerating the speed and reliability of implementing algorithms to RTL code and finally into product. CI system tool is also implemented to automate and test the model design so that it also remains up to date

VLSI Design

This book provides some recent advances in design nanometer VLSI chips. The selected topics try to present some open problems and challenges with important topics ranging from design tools, new post-silicon devices, GPU-based parallel computing, emerging 3D integration, and antenna design. The book consists of two parts, with chapters such as: VLSI design for multi-sensor smart systems on a chip, Three-dimensional integrated circuits design for thousand-core processors, Parallel symbolic analysis of large analog circuits on GPU platforms, Algorithms for CAD tools VLSI design, A multilevel memetic algorithm for large SAT-encoded problems, etc

Adding liveness detection to the hand geometry scanner

In today\u27s dynamic society, the efficiency of the Biometric Systems has an increasing tendency to replace the classic but obsolete keys and passwords. Hand Geometry Readers are popular biometrics used for Access and Control applications. One of their weaknesses is vulnerability to spoofing using fake hands (latex, play-doh or dead-hands).;The objective of this thesis is to design a feature to be added to the Hand Geometry Scanner in order to detect vitality in the hand, reducing spoofing possibilities.;This thesis demonstrates how the Hand Reader was successfully spoofed and shows the implementation of the live detection feature through an inexpensive but efficient electronic design.;The method used for detection is Photo-Plethysmography. The Reflectance Sensor built is of original conception. After amplifying, filtering and processing the sensor\u27s signal, a message is displayed onto an LCD, concerning the liveness of the hand and the pulse rate

A 256-input micro-electrode array with integrated cmos amplifiers for neural signal recording

Thesis (Ph.D.)--Boston UniversityThe nervous system communicates and processes information through its basic structural units -- individual neurons (nerve cells). Neurons convey neural information via electrical and chemical signals, which makes electrophysiological recording techniques very important in the study of neurophysiology. Specifically, active microelectrode arrays (MEAs) with amplifiers integrated on the same substrate are used because they provide a very powerful neural electrical recording technique that can be directly interfaced to acute slices and cell cultures. 2D planer electrodes are typically used for recording from neural cultures in vitro, while in vivo recording in live animals invariably requires the use of 3D electrodes. I have designed an active MEA with neural amplifiers and 3D electrodes, all integrated on a single chip. The electrodes are commercially available 3D C4 (Controlled Collapse Chip Connect) flip-chip bonding solder balls that have a diameter of 100 µm and a pitch of 200 µm. An active MEA neural recording chip -- the Multiple-Input Neural Sensor (MINS) chip -- was designed and fabricated using the IBM BiCMOS 8HP 0.13 µm technology. The MINS IC has 256 input channels that are time-division multiplexed into two output pads. Each channel was designed to work at a 20 kHz frame rate with a total voltage gain of 60 dB per channel with an input-referred noise voltage of 5.3 µVrms over 10 Hz to 10 kHz. The entire MINS chip has an area of 4 x 4 mm^2 with 256 input C4s plus 20 wire-bond pads on two adjacent edges of the chip for power, control, and outputs. The fabricated MINS chips are wire-bonded to standard pin grid array (PGA), open-top PGA, and custom-designed printed circuit board (PCB) packages for electrical, in vitro, and in vivo testing, respectively. After process variation correction, the voltage gain of the 256 neural amplifiers, measured in vitro across several chips, has a mean value of 58.7 dB and a standard deviation of 0.37 dB. Measurements done with the electrical testing package demonstrate that the MINS IC has a flat frequency response from 0.05 Hz to 1.4 MHz, an input-referred noise voltage of 4.6 µVrms over 10 Hz to 10 kHz, an output voltage swing as large as 1.5 V peak-to-peak, and a total power consumption of 11.25 mW, or 43.9 µW per input channel

The development of a novel on-line system for the monitoring and control of fermentation processes

A thesis submitted to the University of Luton for the degree of Doctor of PhilosophyThis thesis describes the development of a computer controlled on-line system for fermentation monitoring and control. The entire system consists of a laboratory fermenter, flow injection system (four channels), a newly designed on-line filter, biomass analysis channel, pH and oxygen controllers as well as a spectrophotometer. A new design of gas driven flow injection analysis (FIA) allows a large number of reagents to be handled. The computer-controlled four channel PIA system is well suited for sequential analysis, which is important for fermentation on-line mOnitoring. The system can change the wavelength of the spectrophotometer automatically for each PIA channel, which makes the system powerful and flexible. A high frequency, low energy ultrasonic filter was modified and applied to the system for on-line mammalian cell culture sampling without breaking the sterile barrier. The results show that this novel application of ultrasonic filter technology results in higher efficiency and reliability and a longer life cycle than other types of filter. All the operations of the analytical system are controlled by a Macintosh computer (Quadra 950). The control program was written in LabVIEW which is a graphical programming language and well applicable to fermentation control. The software communicates with detectors, data acquisition, data analysis and presentation. The system can programmatically control up to 50 devices. Mammalian cell batch culture was used as an example of the application of the system. The system consists of a laboratory fermenter with a continuous sample withdrawal filter and an analysis system where glucose, lactate and ammonia, lactate dehydrogenase and biomass were measured. Cell viability was estimated by microscopic assay with trypan blue. pH and Oxygen were also measured. The system response was fast and yields a large number of reliable and precise analytical results which can be of great importance in the monitoring and control of mammalian cell culture conditions