Design of low-voltage power efficient frequency dividers in folded MOS current mode logic

In this paper we propose a methodology to design high-speed, power-efficient static frequency dividers based on the low-voltage Folded MOS Current Mode Logic (FMCML) approach. A modeling strategy to analyze the dependence of propagation delay and power consumption on the bias currents of the divide-by-2 (DIV2) cell is introduced. We demonstrate that the behavior of the FMCML DIV2 cell is different both from the one of the conventional MCML DFF (D-type Flip-Flop) and from FMCML DFF without a level shifter. Then an analytical strategy to optimize the divider in different design scenarios: maximum speed, minimum power-delay product (PDP) or minimum energy-delay product (EDP) is presented. The possibility to scale the bias currents through the divider stages without affecting the speed performance is also investigated. The proposed analytical approach allows to gain a deep insight into the circuit behavior and to comprehensively optimize the different design tradeoffs. The derived models and design guidelines are validated against transistor level simulations referring to a commercial 28nm FDSOI CMOS process. Different divide-by-8 circuits following different optimization strategies have been designed in the same 28nm CMOS technology showing the effectiveness of the proposed methodology

Reconfigurable Receiver Front-Ends for Advanced Telecommunication Technologies

The exponential growth of converging technologies, including augmented reality, autonomous vehicles, machine-to-machine and machine-to-human interactions, biomedical and environmental sensory systems, and artificial intelligence, is driving the need for robust infrastructural systems capable of handling vast data volumes between end users and service providers. This demand has prompted a significant evolution in wireless communication, with 5G and subsequent generations requiring exponentially improved spectral and energy efficiency compared to their predecessors. Achieving this entails intricate strategies such as advanced digital modulations, broader channel bandwidths, complex spectrum sharing, and carrier aggregation scenarios. A particularly challenging aspect arises in the form of non-contiguous aggregation of up to six carrier components across the frequency range 1 (FR1). This necessitates receiver front-ends to effectively reject out-of-band (OOB) interferences while maintaining high-performance in-band (IB) operation. Reconfigurability becomes pivotal in such dynamic environments, where frequency resource allocation, signal strength, and interference levels continuously change. Software-defined radios (SDRs) and cognitive radios (CRs) emerge as solutions, with direct RF-sampling receivers offering a suitable architecture in which the frequency translation is entirely performed in digital domain to avoid analog mixing issues. Moreover, direct RF- sampling receivers facilitate spectrum observation, which is crucial to identify free zones, and detect interferences. Acoustic and distributed filters offer impressive dynamic range and sharp roll off characteristics, but their bulkiness and lack of electronic adjustment capabilities limit their practicality. Active filters, on the other hand, present opportunities for integration in advanced CMOS technology, addressing size constraints and providing versatile programmability. However, concerns about power consumption, noise generation, and linearity in active filters require careful consideration.This thesis primarily focuses on the design and implementation of a low-voltage, low-power RFFE tailored for direct sampling receivers in 5G FR1 applications. The RFFE consists of a balun low-noise amplifier (LNA), a Q-enhanced filter, and a programmable gain amplifier (PGA). The balun-LNA employs noise cancellation, current reuse, and gm boosting for wideband gain and input impedance matching. Leveraging FD-SOI technology allows for programmable gain and linearity via body biasing. The LNA's operational state ranges between high-performance and high-tolerance modes, which are apt for sensitivityand blocking tests, respectively. The Q-enhanced filter adopts noise-cancelling, current-reuse, and programmable Gm-cells to realize a fourth-order response using two resonators. The fourth-order filter response is achieved by subtracting the individual response of these resonators. Compared to cascaded and magnetically coupled fourth-order filters, this technique maintains the large dynamic range of second-order resonators. Fabricated in 22-nm FD-SOI technology, the RFFE achieves 1%-40% fractional bandwidth (FBW) adjustability from 1.7 GHz to 6.4 GHz, 4.6 dB noise figure (NF) and an OOB third-order intermodulation intercept point (IIP3) of 22 dBm. Furthermore, concerning the implementation uncertainties and potential variations of temperature and supply voltage, design margins have been considered and a hybrid calibration scheme is introduced. A combination of on-chip and off-chip calibration based on noise response is employed to effectively adjust the quality factors, Gm-cells, and resonance frequencies, ensuring desired bandpass response. To optimize and accelerate the calibration process, a reinforcement learning (RL) agent is used.Anticipating future trends, the concept of the Q-enhanced filter extends to a multiple-mode filter for 6G upper mid-band applications. Covering the frequency range from 8 to 20 GHz, this RFFE can be configured as a fourth-order dual-band filter, two bandpass filters (BPFs) with an OOB notch, or a BPF with an IB notch. In cognitive radios, the filter’s transmission zeros can be positioned with respect to the carrier frequencies of interfering signals to yield over 50 dB blocker rejection

Radiation Tolerant Electronics, Volume II

Research on radiation tolerant electronics has increased rapidly over the last few years, resulting in many interesting approaches to model radiation effects and design radiation hardened integrated circuits and embedded systems. This research is strongly driven by the growing need for radiation hardened electronics for space applications, high-energy physics experiments such as those on the large hadron collider at CERN, and many terrestrial nuclear applications, including nuclear energy and safety management. With the progressive scaling of integrated circuit technologies and the growing complexity of electronic systems, their ionizing radiation susceptibility has raised many exciting challenges, which are expected to drive research in the coming decade.After the success of the first Special Issue on Radiation Tolerant Electronics, the current Special Issue features thirteen articles highlighting recent breakthroughs in radiation tolerant integrated circuit design, fault tolerance in FPGAs, radiation effects in semiconductor materials and advanced IC technologies and modelling of radiation effects

Design of a Dual Band Local Positioning System

This work presents a robust dual band local positioning system (LPS) working in the 2.4GHz and 5.8GHz industrial science medical (ISM) bands. Position measurement is based on the frequency-modulated continuous wave (FMCW) radar approach, which uses radio frequency (RF) chirp signals for propagation time and therefore distance measurements. Contrary to state of the art LPS, the presented system uses data from both bands to improve accuracy, precision and robustness. A complete system prototype is designed consisting of base stations and tags encapsulating most of the RF and analogue signal processing in custom integrated circuits. This design approach allows to reduce size and power consumption compared to a hybrid system using off-the-shelf components. Key components are implemented using concepts, which support operation in multiple frequency bands, namely, the receiver consisting of a low noise amplifier (LNA), mixer, frequency synthesizer with a wide band voltage-controlled oscillator (VCO) having broadband chirp generation capabilities and a dual band power amplifier. System imperfections occurring in FMCW radar systems are modelled. Effects neglected in literature such as compression, intermodulation, the influence of automatic gain control, blockers and spurious emissions are modeled. The results are used to derive a specification set for the circuit design. Position estimation from measured distances is done using an enhanced version of the grid search algorithm, which makes use of data from multiple frequency bands. The algorithm is designed to be easily and efficiently implemented in embedded systems. Measurements show a coverage range of the system of at least 245m. Ranging accuracy in an outdoor scenario can be as low as 8.2cm. Comparative dual band position measurements prove an effective outlier filtering in indoor and outdoor scenarios compared to single band results, yielding in a large gain of accuracy. Positioning accuracy in an indoor scenario with an area of 276m² can be improved from 1.27m at 2.4GHz and 1.86m at 5.8GHz to only 0.38m in the dual band case, corresponding to an improvement by at least a factor of 3.3. In a large outdoor scenario of 4.8 km², accuracy improves from 1.88m at 2.4GHz and 5.93m at 5.8GHz to 0.68m with dual band processing, which is a factor of at least 2.8.Die vorliegende Arbeit befasst sich mit dem Entwurf eines robusten lokalen Positionierungssystems (LPS), welches in den lizenzfreien Frequenzbereichen für industrielle, wissenschaftliche und medizinische Zwecke (industrial, scientific, medical, ISM) bei 2,4GHz und 5,8GHz arbeitet. Die Positionsbestimmung beruht auf dem Prinzip des frequenzmodulierten Dauerstrichradars (frequency modulated continuous wave, FMCW-Radar), welches hochfrequente Rampensignale für Laufzeitmessungen und damit Abstandsmessungen benutzt. Im Gegensatz zu aktuellen Arbeiten auf diesem Gebiet benutzt das vorgestellte System Daten aus beiden Frequenzbändern zur Erhöhung der Genauigkeit und Präzision sowie Verbesserung der Robustheit. Ein Prototyp des kompletten Systems bestehend aus Basisstationen und mobilen Stationen wurde entworfen. Fast die gesamte analoge hochfrequente Signalverarbeitungskette wurde als anwendungsspezifische integrierte Schaltung realisiert. Verglichen mit Systemen aus Standardkomponenten erlaubt dieser Ansatz die Miniaturisierung der Systemkomponenten und die Einsparung von Leistung. Schlüsselkomponenten wurden mit Konzepten für mehrbandige oder breitbandige Schaltungen entworfen. Dabei wurden Sender und Empfänger bestehend aus rauscharmem Verstärker, Mischer und Frequenzsynthesizer mit breitbandiger Frequenzrampenfunktion implementiert. Außerdem wurde ein Leistungsverstärker für die gleichzeitige Nutzung der beiden definierten Frequenzbänder entworfen. Um Spezifikationen für den Schaltungsentwurf zu erhalten, wurden in der Fachliteratur vernachlässigte Nichtidealitäten von FMCW-Radarsystemen modelliert. Dazu gehören Signalverzerrungen durch Kompression oder Intermodulation, der Einfluss der automatischen Verstärkungseinstellung sowie schmalbandige Störer und Nebenschwingungen. Die Ergebnisse der Modellierung wurden benutzt, um eine Spezifikation für den Schaltungsentwurf zu erhalten. Die Schätzung der Position aus gemessenen Abständen wurde über eine erweiterte Version des Gittersuchalgorithmus erreicht. Dieser nutzt die Abstandsmessdaten aus beiden Frequenzbändern. Der Algorithmus ist so entworfen, dass er effizient in einem eingebetteten System implementiert werden kann. Messungen zeigen eine maximale Reichweite des Systems von mindestens 245m. Die Genauigkeit von Abstandsmessungen im Freiland beträgt 8,2cm. Positionsmessungen wurden unter Verwendung beider Einzelbänder durchgeführt und mit den Ergebnissen des Zweiband-Gittersuchalgorithmus verglichen. Damit konnte eine starke Verbesserung der Positionsgenauigkeit erreicht werden. Die Genauigkeit in einem Innenraum mit einer Grundfläche von 276m² kann verbessert werden von 1,27m bei 2,4GHz und 1,86m bei 5,8GHz zu nur 0,38m im Zweibandverfahren. Das entspricht einer Verbesserung um einen Faktor von mindestens 3,3. In einem größeren Außenszenario mit einer Fläche von 4,8 km² verbessert sich die Genauigkeit um einen Faktor von mindestens 2,8 von 1,88m bei 2,4GHz und 5,93m bei 5,8GHz auf 0,68m bei Nutzung von Daten aus beiden Frequenzbändern

Millimeter-Precision Laser Rangefinder Using a Low-Cost Photon Counter

In this book we successfully demonstrate a millimeter-precision laser rangefinder using a low-cost photon counter. An application-specific integrated circuit (ASIC) comprises timing circuitry and single-photon avalanche diodes (SPADs) as the photodetectors. For the timing circuitry, a novel binning architecture for sampling the received signal is proposed which mitigates non-idealities that are inherent to a system with SPADs and timing circuitry in one chip

Timing Signals and Radio Frequency Distribution Using Ethernet Networks for High Energy Physics Applications

Timing networks are used around the world in various applications from telecommunications systems to industrial processes, and from radio astronomy to high energy physics. Most timing networks are implemented using proprietary technologies at high operation and maintenance costs. This thesis presents a novel timing network capable of distributed timing with subnanosecond accuracy. The network, developed at CERN and codenamed “White- Rabbit”, uses a non-dedicated Ethernet link to distribute timing and data packets without infringing the sub-nanosecond timing accuracy required for high energy physics applications. The first part of this thesis proposes a new digital circuit capable of measuring time differences between two digital clock signals with sub-picosecond time resolution. The proposed digital circuit measures and compensates for the phase variations between the transmitted and received network clocks required to achieve the sub-nanosecond timing accuracy. Circuit design, implementation and performance verification are reported. The second part of this thesis investigates and proposes a new method to distribute radio frequency (RF) signals over Ethernet networks. The main goal of existing distributed RF schemes, such as Radio-Over-Fibre or Digitised Radio-Over-Fibre, is to increase the bandwidth capacity taking advantage of the higher performance of digital optical links. These schemes tend to employ dedicated and costly technologies, deemed unnecessary for applications with lower bandwidth requirements. This work proposes the distribution of RF signals over the “White-Rabbit” network, to convey phase and frequency information from a reference base node to a large numbers of remote nodes, thus achieving high performance and cost reduction of the timing network. Hence, this thesis reports the design and implementation of a new distributed RF system architecture; analysed and tested using a purpose-built simulation environment, with results used to optimise a new bespoke FPGA implementation. The performance is evaluated through phase-noise spectra, the Allan-Variance, and signalto- noise ratio measurements of the distributed signals

Millimeter-Precision Laser Rangefinder Using a Low-Cost Photon Counter

In this book we successfully demonstrate a millimeter-precision laser rangefinder using a low-cost photon counter. An application-specific integrated circuit (ASIC) comprises timing circuitry and single-photon avalanche diodes (SPADs) as the photodetectors. For the timing circuitry, a novel binning architecture for sampling the received signal is proposed which mitigates non-idealities that are inherent to a system with SPADs and timing circuitry in one chip

Receptores de rádio-frequência melhorados e disruptivos

This Ph.D. mainly addresses the reception part of a radio front end, focusing on Radio Frequency (RF) sampling architectures. These are considered to be the most promising future candidates to get better performance in terms of bandwidth and agility, following the well-known Software-Defined Radio (SDR) concept. The study considers the usage of an RF receiver in a standalone operation, i.e., used for receiving unknown data at the antenna, and when used as observation path for Power Amplifier (PA) linearization via Digital Predistortion (DPD), since nowadays this represents a mandatory technique to increase overall system’s performance. Firstly, commercial available RF Analog-Digital-Converters (ADCs) are studied and characterized to understand their limitations when used in DPD scenarios. A method for characterization and digital post-compensation to improve performance is proposed and evaluated. Secondly, an innovative FPGA-based RF single-bit pulsed converter based on Pulse Width Modulation (PWM) is addressed targeting frequency agility, high analog input bandwidth, and system integration, taking profit of an FPGA-based implementation. The latter was optimized based on PWM theoretical behavior maximizing Signal-to-Noise-Ratio (SNR) and bandwidth. The optimized receiver, was afterwards evaluated in a 5G C-RAN architecture and as a feedback loop for DPD. Finally, a brief study regarding DPD feedback loops in the scope of multiantenna transmitters is presented. This Ph.D. contributes with several advances to the state-of-the-art of SDR receiver, and to the so-called SDR DPD concept.Este doutoramento endereça principalmente a componente de receção de um transcetor de rádio-frequência (RF), focando-se em arquiteturas de receção de amostragem em RF. Estas são assim consideradas como sendo as mais promissoras para o futuro, em termos de desempenho, largura de banda e agilidade, de acordo com o conhecido conceito de Rádios Definidos por Software (SDR). O estudo considera o uso dos recetores de RF em modo standalone, i.e., recebendo dados desconhecidos provenientes da antena, e também quando usados como caminho de observação para aplicação de linearização de amplificadores de potência (PAs) via pré-distorção digital (DPD), pois atualmente esta é uma técnica fundamental para aumentar o desempenho geral do sistema. Em primeiro lugar, os conversores analógico-digital de RF são estudados e caracterizados para perceber as suas limitações quando usados em cenários de DPD. Um método de caracterização e pós compensação digital é proposto para obter melhorias de desempenho. Em segundo lugar, um novo recetor pulsado de um bit baseado em Modulação de Largura de Pulso (PWM) e implementado em Agregado de Células Lógicas Programáveis (FPGA) é endereçado, visando agilidade em frequência, largura de banda analógica e integração de sistema, tirando proveito da implementação em FPGA. Este recetor foi otimizado com base no modelo comportamental teórico da modulação PWM, maximizando a relação sinalruído (SNR) e a largura de banda. O recetor otimizado foi posteriormente avaliado num cenário 5G de uma arquitetura C-RAN e também num cenário em que serve de caminho de observação para DPD. Finalmente, um breve estudo relativo a caminhos de observação de DPD no contexto de transmissores multi-antena é também apresentado. Este doutoramento contribui com vários avanços no estado da arte de recetores SDR e no conceito de SDR DPD.Programa Doutoral em Engenharia Eletrotécnic