11 research outputs found

    A system design approach toward integrated cryogenic quantum control systems

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    In this paper, we provide a system level perspective on the design of control electronics for large scale quantum systems. Quantum computing systems with high-fidelity control and readout, coherent coupling, calibrated gates, and reconfigurable circuits with low error rates are expected to have superior quantum volumes. Cryogenic CMOS plays a crucial role in the realization of scalable quantum computers, by minimizing the feature size, lowering the cost, power consumption, and implementing low latency error correction. Our approach toward achieving scalable feed-back based control systems includes the design of memory based arbitrary waveform generators (AWG's), wide band radio frequency analog to digital converters, integrated amplifier chain, and state discriminators that can be synchronized with gate sequences. Digitally assisted designs, when implemented in an advanced CMOS node such as 7 nm can reap the benefits of low power due to scaling. A qubit readout chain demands several amplification stages before the digitizer. We propose the co-integration of our in-house developed InP HEMT LNAs with CMOS LNA stages to achieve the required gain at the digitizer input with minimal area. Our approach using high impedance matching between the HEMT LNA and the cryogenic CMOS receiver can relax the design constraints of an inverter-based CMOS LNA, paving the way toward a fully integrated qubit readout chain. The qubit state discriminator consists of a digital signal processor that computes the qubit state from the digitizer output and a pre-determined threshold. The proposed system realizes feedback-based optimal control for error mitigation and reduction of the required data rate through the serial interface to room temperature electronics

    On the VCO/Frequency Divider Interface in Cryogenic CMOS PLL for Quantum Computing Applications

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    The availability of quantum microprocessors is mandatory, to efficiently run those quantum al-gorithms promising a radical leap forward in computation capability. Silicon-based nanostruc-tured qubits appear today as a very interesting approach, because of their higher information density, longer coherence times, fast operation gates, and compatibility with the actual CMOS technology. In particular, thanks to their phase noise properties, the actual CMOS RFIC Phase-Locked Loops (PLL) and Phase-Locked Oscillators (PLO) are interesting circuits to synthe-size control signals for spintronic qubits. In a quantum microprocessor, these circuits should op-erate close to the qubits, that is, at cryogenic temperatures. The lack of commercial cryogenic Design Kits (DK) may make the interface between the Voltage Controlled Oscillator (VCO) and the Frequency Divider (FD) a serious issue. Nevertheless, currently this issue has not been sys-tematically addressed in the literature. The aim of the present paper is to investigate the VCO/FD interface when the temperature drops from room to cryogenic. To this purpose, physi-cal models of electronics passive/active devices and equivalent circuits of VCO and the FD were developed at room and cryogenic temperatures. The modeling activity has led to design guide-lines for the VCO/FD interface, useful in the absence of cryogenic DKs

    Dynamical quantum phase transitions of the Schwinger model: real-time dynamics on IBM Quantum

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    Simulating real-time dynamics of gauge theories represents a paradigmatic use case to test the hardware capabilities of a quantum computer, since it can involve non-trivial input states preparation, discretized time evolution, long-distance entanglement, and measurement in a noisy environment. We implement an algorithm to simulate the real-time dynamics of a few-qubit system that approximates the Schwinger model in the framework of lattice gauge theories, with specific attention to the occurrence of a dynamical quantum phase transition. Limitations in the simulation capabilities on IBM Quantum are imposed by noise affecting the application of single-qubit and two-qubit gates, which combine in the decomposition of Trotter evolution. The experimental results collected in quantum algorithm runs on IBM Quantum are compared with noise models to characterize the performance in the absence of error mitigation

    Development of Control Circuits for Silicon MOS Quantum Dot Qubit Network

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    Future quantum processors intend to operate on millions of qubits and Silicon Metal Oxide Semiconductor (MOS) Quantum Dot qubits are a good fit for such a large-scale system due to their compactness in size and large coherence time. To control the operations of the qubits in such a large-scale system, efficient and careful design of the control circuits is very challenging. Here, in this thesis a control circuit is designed for silicon MOS quantum dot qubits operating on a node/ network architecture. Rather than using a 2D array of quantum dots, a node/ network architecture provides enough space for the wiring of integrated control circuits. The control circuit designed here is expected to work on millikelvin (mK) temperature and number of control lines from the mK temperature to 1-4 K temperature, where the digital control systems are operated, is reduced significantly compared to the number of qubits. The reduction in number of control lines from mK temperature is one of the basic requirements while scaling up. All these control circuits operate on the quantum dots based on the assumption that, all the dots are at same potential throughout the network. In practice due to fabrication variations and connection differences the potential of quantum dots varies from qubit to qubit. To solve this problem and pre-tune all the quantum dots to same potential prior to the operation of control circuit, a device level error correcting scheme is introduced and verified by simulation in this thesis

    Digital Readout and Control of a Superconducting Qubit

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    In the quest to build a fault-tolerant quantum computer, superconducting circuits based on Josephson junctions have emerged as a leading architecture. Coherence times have increased significantly over the last two decades, and processors with ∼ 50 qubits have been experimentally demonstrated. These systems traditionally utilize microwave frequency control signals, and heterodyne based detection schemes for measurement. Both of these techniques rely heavily on room temperature microwave generators, high-bandwidth lines from room temperature to millikelvin temperatures, and bulky non-reciprocal elements such as cryogenic microwave isolators. Reliance on these elements makes it impractical to scale existing devices up a single order of magnitude, let alone the 5-6 orders of magnitude needed for performing fault-tolerant quantum algorithms. Here, I present results that suggesting superconducting digital logic, namely Single Flux Quantum (SFQ) logic, can replace analog control and measurement techniques, avoiding the significant overhead involved. I describe a scheme for measuring qubits with a device known as a Josephson Photomultiplier (JPM), which crucially stores the result of a qubit measurement in a classical circulating supercurrent within the device and allows for integration with SFQ detection circuitry. This technique is experimentally demonstrated, with single-shot measurement fidelity of 92%. Two methods for accessing this measurement result are presented, one utilizing ballistic fluxons, and another utilizing flux comparison. Initial experimental results of the latter are presented. In addition, I describe a scheme for controlling qubits with sequences of digital SFQ pulses. This method is then used to control a qubit without a microwave signal generator, with results of an average single-qubit gate fidelity of around 95%. When combined, these techniques form a nearly fully digital interface to superconducting qubits, which could allow these systems to scale much more easily

    Using SiGe HBTs for quantum science at deep cryogenic temperatures

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    The objective of this research is to investigate the feasibility of using BiCMOS technology for these quantum science applications and clear some major roadblocks. The requirement for these applications is detailed, and the research is conducted in a systematic way targeting four important aspects of SiGe HBTs, namely, cryogenic characterizations, device physics, compact modeling, and circuit designs.Ph.D
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