Dual-Band Transmitter and Receiver with Bowtie-Antenna in 0.13 μm SiGe BiCMOS for Gas Spectroscopy at 222 - 270 GHz

This paper presents a transmitter (TX) and a receiver (RX) with bowtie-antenna and silicon lens for gas spectroscopy at 222-270 GHz, which are fabricated in IHP’s 0.13 μm SiGe BiCMOS technology. The TX and RX use two integrated local oscillators for 222 – 256 GHz and 250 – 270 GHz, which are switched for dual-band operation. Due to its directivity of about 27 dBi, the single integrated bowtie-antenna with silicon lens enables an EIRP of about 25 dBm for the TX, and therefore a considerably higher EIRP for the 2-band TX compared to previously reported systems. The double sideband noise temperature of the RX is 20,000 K (18.5 dB noise figure) as measured by the Y-factor method. Absorption spectroscopy of gaseous methanol is used as a measure for the performance of the gas spectroscopy system with TX- and RX-modules

Dual-Band Transmitter and Receiver With Bowtie-Antenna in 0.13 μm SiGe BiCMOS for Gas Spectroscopy at 222 - 270 GHz

This paper presents a transmitter (TX) and a receiver (RX) with bowtie-antenna and silicon lens for gas spectroscopy at 222-270 GHz, which are fabricated in IHP's 0.13 μm SiGe BiCMOS technology. The TX and RX use two integrated local oscillators for 222 - 256 GHz and 250 - 270 GHz, which are switched for dual-band operation. Due to its directivity of about 27 dBi, the single integrated bowtie-antenna with silicon lens enables an EIRP of about 25 dBm for the TX, and therefore a considerably higher EIRP for the 2-band TX compared to previously reported systems. The double sideband noise temperature of the RX is 20,000 K (18.5 dB noise figure) as measured by the Y-factor method. Absorption spectroscopy of gaseous methanol is used as a measure for the performance of the gas spectroscopy system with TX- and RX-modules

Optoelectronic oscillator for 5G wireless networks and beyond

With the development of 5G wireless network and beyond, the wireless carrier frequency will definitely reach millimeter-wave (mm-wave) and even terahertz (THz). As one of the key elements in wireless networks, the local oscillator (LO) needs to operate at mm-wave and THz band with lower phase noise, which becomes a major challenge for commercial LOs. In this article, we investigate the recent developments of the electronic integrated circuit (EIC) oscillator and the optoelectronic oscillator (OEO), and especially investigate the prospect of OEO serving as a qualified LO in the 5G wireless network and beyond. Both the EIC oscillators and OEOs are investigated, including their basic theories of operation, representative techniques and some milestones in applications. Then, we compare the performances between the EIC oscillators and the OEOs in terms of frequency accuracy, phase noise, power consumption and cost. After describing the specific requirements of LO based on the standard of 5G and 6G wireless communication systems, we introduce an injection-locked OEO architecture which can be implemented to distribute and synchronize LOs. The OEO has better phase noise performance at high frequency, which is greatly desired for LO in 5G wireless network and beyond. Besides, the OEO provides an easy and low-loss method to distribute and synchronize mm-wave and THz LOs. Thanks to photonic integrated circuit development, the power consumption and cost of OEO reduce gradually. It is foreseeable that the integrated OEO with lower cost may have a promising prospect in the 5G wireless network and beyond

Microwave CMOS VCOs and Front-Ends - using integrated passives on-chip and on-carrier

The increasing demand for high data rates in wireless communication systems is increasing the requirements on the transceiver front-ends, as they are pushed to utilize more and wider bands at higher frequencies. The work in this thesis is focused on receiver front-ends composed of Low Noise Amplifiers (LNAs), Mixers, and Voltage Controlled Oscillators (VCOs) operating at microwave frequencies. Traditionally, microwave electronics has used exclusive and more expensive semiconductor technologies (III-V materials). However, the rapid development of consumer electronics (e.g. video game consoles) the last decade has pushed the silicon CMOS IC technology towards even smaller feature sizes. This has resulted in high speed transistors (high fT and fmax) with low noise figures. However, as the breakdown voltages have decreased, a lower supply voltage must be used, which has had a negative impact on linearity and dynamic range. Nonetheless, todays downscaled CMOS technology is a feasible alternative for many microwave and even millimeter wave applications. The low quality factor (Q) of passive components on-chip usually limits the high frequency performance. For inductors realized in a standard CMOS process the substrate coupling results in a degraded Q. The quality factor can, however, be improved by moving the passive components off-chip and integrating them on a low loss carrier. This thesis therefore features microwave front-end and VCO designs in CMOS, where some designs have been flip-chip mounted on carriers featuring high Q inductors and low loss baluns. The thesis starts with an introduction to wireless communication, receiver architectures, front-end receiver blocks, and low loss carrier technology, followed by the included papers. The six included papers show the capability of CMOS and carrier technology at microwave frequencies: Papers II, III, and VI demonstrate fully integrated CMOS circuit designs. An LC-VCO using an accumulation mode varactor is presented in Paper II, a QVCO using 4-bit switched tuning is shown in Paper III, and a quadrature receiver front-end (including QVCO) is demonstrated in paper VI. Papers I and IV demonstrate receiver front-ends using low loss baluns on carrier for the LO and RF signals. Paper IV also includes a front-end using single-ended RF input which is converted to differential form in a novel merged LNA and balun. A VCO demonstrating the benefits of a high Q inductor on carrier is presented in Paper V

準ミリ波・ミリ波領域における低位相雑音電圧制御発振器のLC共振器に関する研究

2017岡山県立大学大学

Transceiver architectures and sub-mW fast frequency-hopping synthesizers for ultra-low power WSNs

Wireless sensor networks (WSN) have the potential to become the third wireless revolution after wireless voice networks in the 80s and wireless data networks in the late 90s. This revolution will finally connect together the physical world of the human and the virtual world of the electronic devices. Though in the recent years large progress in power consumption reduction has been made in the wireless arena in order to increase the battery life, this is still not enough to achieve a wide adoption of this technology. Indeed, while nowadays consumers are used to charge batteries in laptops, mobile phones and other high-tech products, this operation becomes infeasible when scaled up to large industrial, enterprise or home networks composed of thousands of wireless nodes. Wireless sensor networks come as a new way to connect electronic equipments reducing, in this way, the costs associated with the installation and maintenance of large wired networks. To accomplish this task, it is necessary to reduce the energy consumption of the wireless node to a point where energy harvesting becomes feasible and the node energy autonomy exceeds the life time of the wireless node itself. This thesis focuses on the radio design, which is the backbone of any wireless node. A common approach to radio design for WSNs is to start from a very simple radio (like an RFID) adding more functionalities up to the point in which the power budget is reached. In this way, the robustness of the wireless link is traded off for power reducing the range of applications that can draw benefit form a WSN. In this thesis, we propose a novel approach to the radio design for WSNs. We started from a proven architecture like Bluetooth, and progressively we removed all the functionalities that are not required for WSNs. The robustness of the wireless link is guaranteed by using a fast frequency hopping spread spectrum technique while the power budget is achieved by optimizing the radio architecture and the frequency hopping synthesizer Two different radio architectures and a novel fast frequency hopping synthesizer are proposed that cover the large space of applications for WSNs. The two architectures make use of the peculiarities of each scenario and, together with a novel fast frequency hopping synthesizer, proved that spread spectrum techniques can be used also in severely power constrained scenarios like WSNs. This solution opens a new window toward a radio design, which ultimately trades off flexibility, rather than robustness, for power consumption. In this way, we broadened the range of applications for WSNs to areas in which security and reliability of the communication link are mandatory

Advances in Filter Miniaturization and Design/Analysis of RF MEMS Tunable Filters

The main purpose of this dissertation was to address key issues in the design and analysis of RF/microwave filters for wireless applications. Since RF/microwave filters are one of the bulkiest parts of communication systems, their miniaturization is one of the most important technological challenges for the development of compact transceivers. In this work, novel miniaturization techniques were investigated for single-band, dual-band, ultra-wideband and tunable bandpass filters. In single-band filters, the use of cross-shaped fractals in half-mode substrate-integrated-waveguide bandpass filters resulted in a 37 percent size reduction. A compact bandpass filter that occupies an area of 0.315 mm2 is implemented in 90-nm CMOS technology for 20 GHz applications. For dual-band filters, using half-mode substrate-integrated-waveguides resulted in a filter that is six times smaller than its full-mode counterpart. For ultra-wideband filters, using slow-wave capacitively-loaded coplanar-waveguides resulted in a filter with improved stopband performance and frequency notch, while being 25 percent smaller in size. A major part of this work also dealt with the concept of 'hybrid' RF MEMS tunable filters where packaged, off-the-shelf RF MEMS switches were used to implement high-performance tunable filters using substrate-integrated-waveguide technology. These 'hybrid' filters are very easily fabricated compared to current state-of-the-art RF MEMS tunable filters because they do not require a clean-room facility. Both the full-mode and half-mode substrate-integrated waveguide tunable filters reported in this work have the best Q-factors (93 - 132 and 75 - 140, respectively) compared to any 'hybrid' RF MEMS tunable filter reported in current literature. Also, the half-mode substrate-integrated waveguide tunable filter is 2.5 times smaller than its full-mode counterpart while having similar performance. This dissertation also presented detailed analytical and simulation-based studies of nonlinear noise phenomena induced by Brownian motion in all-pole RF MEMS tunable filters. Two independent mathematical methods are proposed to calculate phase noise in RF MEMS tunable filters: (1) pole-perturbation approach, and (2) admittance-approach. These methods are compared to each other and to harmonic balance noise simulations using the CAD-model of the RF MEMS switch. To account for the switch nonlinearity in the mathematical methods, a nonlinear nodal analysis technique for tunable filters is also presented. In summary, it is shown that output signal-to-noise ratio degradation due to Brownian motion is maximum for low fractional bandwidth, high order and high quality factor RF MEMS tunable filters. Finally, a self-sustained microwave platform to detect the dielectric constant of organic liquids is presented in this dissertation. The main idea is to use a voltage- controlled negative-resistance oscillator whose frequency of oscillation varies according to the organic liquid under test. To make the system self-sustained, the oscillator is embedded in a frequency synthesizer system, which is then digitally interfaced to a computer for calculation of dielectric constant. Such a system has potential uses in a variety of applications in medicine, agriculture and pharmaceuticals

Energy Efficient Wireless Circuits for IoT in CMOS Technology

The demand for efficient and reliable wireless communication equipment is increasing at a rapid pace. The demand and need vary between different technologies including 5G and IoT. The Radio Frequency Integrated Circuits (RFIC) designers face challenges to achieve higher performance with lower power resources. Although advances in Complementary Metal-Oxide-Semiconductor (CMOS) technology has help designers, challenges still exist. Thus, novel and new ideas are welcome in RFIC design. In this dissertation, many ideas are introduced to improve efficiency and linearity for wireless receivers dedicated to IoT applications. A low-power wireless RF receiver for wireless sensor networks (WSN) is introduced. The receiver has improved linearity with incorporated current-mode circuits and high-selectivity filtering. The receiver operates at a 900 MHz industrial, scientific and medical (ISM) band and is implemented in 130 nm CMOS technology. The receiver has a frequency multiplication mixer, which uses a 300 MHz clock from a local oscillator (LO). The local oscillator is implemented using vertical delay cells to reduce power consumption. The receiver conversion gain is 40 dB and the receiver noise figure (NF) is 14 dB. The receiver IIP3 is −6 dBm and the total power consumption is 1.16 mW. A wireless RF receiver system suitable for Internet-of-Things (IoT) applications is presented. The system can simultaneously harvest energy from out-of-band (OB) blockers with normal receiver operation; thus, the battery life for IoT applications can be extended. The system has only a single antenna for simultaneous RF energy harvesting and wireless reception. The receiver is a mixer-first quadrature receiver designed to tolerate large unavoidable blockers. The system is implemented in 180 nm CMOS technology and operates at 900 MHz industrial, scientific and medical (ISM) band. The receiver gain is 41.5 dB. Operating from a 1 V supply, the receiver core consumes 430 µW. This power can be reduced to 220 µW in the presence of a large blocker (≈ 0 dBm) by the power provided by the blocker RF energy harvesting where the power conversion efficiency (PCE) is 30%. Finally, a highly linear energy efficient wireless receiver is introduced. The receiver architecture is a mixer-first receiver with a Voltage Controlled Oscillator (VCO) based amplifier incorporated as baseband amplifier. The receiver benefits from the high linearity of this amplifier. Moreover, novel clock recycling techniques are applied to make use of the amplifier’s VCOs to clock the mixer circuit and to improve power consumption. The system is implemented in 130 nm CMOS technology and operates at 900 MHz ISM band. The receiver conversion gain is 42 dB and the power consumption is 2.9 mW. The out-of-band IIP3 is 6 dBm. All presented systems and circuits in this dissertation are validated and published in various IEEE journals and conferences