8 research outputs found

    WIRELESS POWER MANAGEMENT CIRCUITS FOR BIOMEDICAL IMPLANTABLE SYSTEMS

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    Ph.DDOCTOR OF PHILOSOPH

    An implantable micro-system for neural prosthesis control and sensory feedback restoration in amputees

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    In this work, the prototype of an electronic bi-directional interface between the Peripheral Nervous System (PNS) and a neuro-controlled hand prosthesis is presented. The system is composed of two Integrated Circuits (ICs): a standard CMOS device for neural recording and a High Voltage (HV) CMOS device for neural stimulation. The integrated circuits have been realized in two different 0.35μm CMOS processes available fromAustriaMicroSystem(AMS). The recoding IC incorporates 8 channels each including the analog front-end and the A/D conversion based on a sigma delta architecture. It has a total area of 16.8mm2 and exhibits an overall power consumption of 27.2mW. The neural stimulation IC is able to provide biphasic current pulses to stimulate 8 electrodes independently. A voltage booster generates a 17V voltage supply in order to guarantee the programmed stimulation current even in case of high impedances at the electrode-tissue interface in the order of tens of k­. The stimulation patterns, generated by a 5-bit current DAC, are programmable in terms of amplitude, frequency and pulse width. Due to the huge capacitors of the implemented voltage boosters, the stimulation IC has a wider area of 18.6mm2. In addition, a maximum power consumption of 29mW was measured. Successful in-vivo experiments with rats having a TIME electrode implanted in the sciatic nerve were carried out, showing the capability of recording neural signals in the tens of microvolts, with a global noise of 7μVrms , and to selectively elicit the tibial and plantarmuscles using different active sites of the electrode. In order to get a completely implantable interface, a biocompatible and biostable package was designed. It hosts the developed ICs with the minimal electronics required for their proper operation. The package consists of an alumina tube closed at both extremities by two ceramic caps hermetically sealed on it. Moreover, the two caps serve as substrate for the hermetic feedthroughs to enable the device powering and data exchange with the external digital controller implemented on a Field-Programmable Gate Array (FPGA) board. The package has an outer diameter of 7mm and a total length of 26mm. In addition, a humidity and temperature sensor was also included inside the package to allow future hermeticity and life-time estimation tests. Moreover, a wireless, wearable and non-invasive EEG recording system is proposed in order to improve the control over the artificial limb,by integrating the neural signals recorded from the PNS with those directly acquired from the brain. To first investigate the system requirements, a Component-Off-The-Shelf (COTS) device was designed. It includes a low-power 8- channel acquisition module and a Bluetooth (BT) transceiver to transmit the acquired data to a remote platform. It was designed with the aimof creating a cheap and user-friendly system that can be easily interfaced with the nowadays widely spread smartphones or tablets by means of a mobile-based application. The presented system, validated through in-vivo experiments, allows EEG signals recording at different sample rates and with a maximum bandwidth of 524Hz. It was realized on a 19cm2 custom PCB with a maximum power consumption of 270mW

    Enhancing selectivity of minimally invasive peripheral nerve interfaces using combined stimulation and high frequency block: from design to application

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    The discovery of the excitable property of nerves was a fundamental step forward in our knowledge of the nervous system and our ability to interact with it. As the injection of charge into tissue can drive its artificial activation, devices have been conceived that can serve healthcare by substituting the input or output of the peripheral nervous system when damage or disease has rendered it inaccessible or its action pathological. Applications are far-ranging and transformational as can be attested by the success of neuroprosthetics such as the cochlear implant. However, the body’s immune response to invasive implants have prevented the use of more selective interfaces, leading to therapy side-effects and off-target activation. The inherent tradeoff between the selectivity and invasiveness of neural interfaces, and the consequences thereof, is still a defining problem for the field. More recently, continued research into how nervous tissue responds to stimulation has led to the discovery of High Frequency Alternating Current (HFAC) block as a stimulation method with inhibitory effects for nerve conduction. While leveraging the structure of the peripheral nervous system, this neuromodulation technique could be a key component in efforts to improve the selectivity-invasiveness tradeoff and provide more effective neuroprosthetic therapy while retaining the safety and reliability of minimally invasive neural interfaces. This thesis describes work investigating the use of HFAC block to improve the selectivity of peripheral nerve interfaces, towards applications such as bladder control or vagus nerve stimulation where selective peripheral nerve interfaces cannot be used, and yet there is an unmet need for more selectivity from stimulation-based therapy. An overview of the underlying neuroanatomy and electrophysiology of the peripheral nervous system combined with a review of existing electrode interfaces and electrochemistry will serve to inform the problem space. Original contributions are the design of a custom multi-channel stimulator able to combine conventional and high frequency stimulation, establishing a suitable experimental platform for ex-vivo electrophysiology of the rat sciatic nerve model for HFAC block, and exploratory experiments to determine the feasibility of using HFAC block in combination with conventional stimulation to enhance the selectivity of minimally-invasive peripheral nerve interfaces.Open Acces

    Development of electronics for microultrasound capsule endoscopy

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    Development of intracorporeal devices has surged in the last decade due to advancements in the semiconductor industry, energy storage and low-power sensing systems. This work aims to present a thorough systematic overview and exploration of the microultrasound (µUS) capsule endoscopy (CE) field as the development of electronic components will be key to a successful applicable µUSCE device. The research focused on investigating and designing high-voltage (HV, < 36 V) generating and driving circuits as well as a low-noise amplifier (LNA) for battery-powered and volume-limited systems. In implantable applications, HV generation with maximum efficiency is required to improve the operational lifetime whilst reducing the cost of the device. A fully integrated hybrid (H) charge pump (CP) comprising a serial-parallel (SP) stage was designed and manufactured for > 20 V and 0 - 100 µA output capabilities. The results were compared to a Dickson (DKCP) occupying the same chip area; further improvements in the SPCP topology were explored and a new switching scheme for SPCPs was introduced. A second regulated CP version was excogitated and manufactured to use with an integrated µUS pulse generator. The CP was manufactured and tested at different output currents and capacitive loads; its operation with an US pulser was evaluated and a novel self-oscillating CP mechanism to eliminate the need of an auxiliary clock generator with a minimum area overhead was devised. A single-output universal US pulser was designed, manufactured and tested with 1.5 MHz, 3 MHz, and 28 MHz arrays to achieve a means of fully-integrated, low-power transducer driving. The circuit was evaluated for power consumption and pulse generation capabilities with different loads. Pulse-echo measurements were carried out and compared with those from a commercial US research system to characterise and understand the quality of the generated pulse. A second pulser version for a 28 MHz array was derived to allow control of individual elements. The work involved its optimisation methodology and design of a novel HV feedback-based level-shifter. A low-noise amplifier (LNA) was designed for a wide bandwidth µUS array with a centre frequency of 28 MHz. The LNA was based on an energy-efficient inverter architecture. The circuit encompassed a full power-down functionality and was investigated for a self-biased operation to achieve lower chip area. The explored concepts enable realisation of low power and high performance LNAs for µUS frequencies

    Estudio y análisis de un circuito de monitoreo de carga residual para prótesis epirretinal

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    La retina es un tejido del ojo que se encarga de convertir la luz incidente en pulsos eléctricos para luego ser enviados al cerebro. Las células encargadas de dicha conversión son las células fotorreceptoras, estas hacen posible la visión. La prótesis de retina se encarga de reemplazar la función que realizaban las células fotorreceptoras al recrear la sensación de visión por medio de la estimulación de las células neuronales sanas restantes en la retina por medio del envío de pulsos bifásicos a través de un arreglo de electrodos. No obstante, una de las grandes preocupaciones en cuanto a la estimulación de la prótesis de retina, es que cualquier exceso de acumulación de carga que supere los límites de seguridad tolerables puede causar daño a la retina. A raíz de lo anterior mencionado, se procedió al estudio de un circuito cuyo objetivo es balancear la carga residual existente de forma controlada. Asimismo, se realizó un análisis de cada etapa del circuito: comparadores dinámicos, latch SR, parte de lógica y la etapa de compensación y se definió la estructura del circuito de seguridad. Por último, gracias a la herramienta Analog Design Environment de CADENCE se realizó simulaciones comprobando la funcionalidad de la solución planteada al dimensionar correctamente los transistores y definir una correcta corriente de compensación. Así pues, se obtuvo un circuito capaz de monitorear y corregir la carga del electrodo cuando ésta sale de los límites de seguridad y que presenta una baja disipación de potencia.Tesi

    A 20V-compliance implantable neural stimulator IC with closed-loop power control, active charge balancing, and electrode impedance check

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    10.1109/ASSCC.2014.7008895Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014201-20
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