NIKEL: Electronics and data acquisition for kilopixels kinetic inductance camera

A prototype of digital frequency multiplexing electronics allowing the real time monitoring of microwave kinetic inductance detector (MKIDs) arrays for mm-wave astronomy has been developed. Thanks to the frequency multiplexing, it can monitor simultaneously 400 pixels over a 500 MHz bandwidth and requires only two coaxial cables for instrumenting such a large array. The chosen solution and the performances achieved are presented in this paper.Comment: 21 pages, 14 figure

Theory and design of uniform DFT, parallel, quadrature mirror filter banks

In this paper, the theory of uniform DFT, parallel, quadrature mirror filter (QMF) banks is developed. The QMF equations, i.e., equations that need to be satisfied for exact reconstruction of the input signal, are derived. The concept of decimated filters is introduced, and structures for both analysis and synthesis banks are derived using this concept. The QMF equations, as well as closed-form expressions for the synthesis filters needed for exact reconstruction of the input signalx(n), are also derived using this concept. In general, the reconstructed. signalhat{x}(n)suffers from three errors: aliasing, amplitude distortion, and phase distortion. Conditions for exact reconstruction (i.e., all three distortions are zero, andhat{x}(n)is equal to a delayed version ofx(n))of the input signal are derived in terms of the decimated filters. Aliasing distortion can always be completely canceled. Once aliasing is canceled, it is possible to completely eliminate amplitude distortion (if suitable IIR filters are employed) and completely eliminate phase distortion (if suitable FIR filters are employed). However, complete elimination of all three errors is possible only with some simple, pathalogical stable filter transfer functions. In general, once aliasing is canceled, the other distortions can be minimized rather than completely eliminated. Algorithms for this are presented. The properties of FIR filter banks are then investigated. Several aspects of IIR filter banks are also studied using the same framework

FPGA based Uniform Channelizer Implementation

Channelizers are widely used in modern digital communication systems. Advanced uniform multirate channelization have been theoretically proved to be capable of reducing the computational load, with a better performance. Therefore, in this thesis, we implement these designs on a FPGA board for the sake of the comprehensive evaluation of resource usage, performance and frequency response. The uniform filter-banks are one of the most essential unit in channelization. The Generalised Discrete Fourier Transform Modulated Filter Bank (GDFT-FB), as an important variant of basic a DFT-FB, has been implemented in FPGA and demonstrated with a better computational saving rather than traditional schemes. Moreover the oversampling version is demonstrated to have a better frequency response with an acceptable amount of extra resources. On the other hand, frequency response masking (FRM) techniques is able to reduce the number of coefficients. Therefore, the full FRM GDFT-FB and alternative narrowband FRM GDFT-FB are both implemented in FPGA platform, in order to achieve a better performance and hardware efficiency

Generalized polyphase representation and application to coding gain enhancement

Generalized polyphase representations (GPP) have been mentioned in literature in the context of several applications. In this paper, we provide a characterization for what constitutes a valid GPP. Then, we study an application of GPP, namely in improving the coding gains of transform coding systems. We also prove several properties of the GPP

Coding gain in paraunitary analysis/synthesis systems

A formal proof that bit allocation results hold for the entire class of paraunitary subband coders is presented. The problem of finding an optimal paraunitary subband coder, so as to maximize the coding gain of the system, is discussed. The bit allocation problem is analyzed for the case of the paraunitary tree-structured filter banks, such as those used for generating orthonormal wavelets. The even more general case of nonuniform filter banks is also considered. In all cases it is shown that under optimal bit allocation, the variances of the errors introduced by each of the quantizers have to be equal. Expressions for coding gains for these systems are derived

Significance of Logic Synthesis in FPGA-Based Design of Image and Signal Processing Systems

This chapter, taking FIR filters as an example, presents the discussion on efficiency of different implementation methodologies of DSP algorithms targeting modern FPGA architectures. Nowadays, programmable technology provides the possibility to implement digital systems with the use of specialized embedded DSP blocks. However, this technology gives the designer the possibility to increase efficiency of designed systems by exploitation of parallelisms of implemented algorithms. Moreover, it is possible to apply special techniques, such as distributed arithmetic (DA). Since in this approach, general-purpose multipliers are replaced by combinational LUT blocks, it is possible to construct digital filters of very high performance. Additionally, application of the functional decomposition-based method to LUT blocks optimization, and mapping has been investigated. The chapter presents results of the comparison of various design approaches in these areas