394 research outputs found

    Ultra Wideband

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    Ultra wideband (UWB) has advanced and merged as a technology, and many more people are aware of the potential for this exciting technology. The current UWB field is changing rapidly with new techniques and ideas where several issues are involved in developing the systems. Among UWB system design, the UWB RF transceiver and UWB antenna are the key components. Recently, a considerable amount of researches has been devoted to the development of the UWB RF transceiver and antenna for its enabling high data transmission rates and low power consumption. Our book attempts to present current and emerging trends in-research and development of UWB systems as well as future expectations

    펄스 기반 피드 포워드 이퀄라이저를 갖춘 고용량 DRAM을 위한 컨트롤러 PHY 설계

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    학위논문 (박사) -- 서울대학교 대학원 : 공과대학 전기·정보공학부, 2020. 8. 김수환.A controller PHY for managed DRAM solution, which is a new memory structure to maximize capacity while minimizing refresh power, is presented. Inter-symbol interference is critical in such a high-capacity DRAM interface in which many DRAM chips share a command/address (C/A) channel. A pulse-based feed-forward equalizer (PB-FFE) is introduced to reduce ISI on a C/A channel. The controller PHY supports all the training sequences specified in the DDR4 standard. A glitch-free DCDL is also adopted to perform link training efficiently and to reduce training time. The DQ transmitter adopts quarter-rate architecture to reduce output latency. For the quarter-rate transmitters in DQ, we propose a quadrature error corrector (QEC), in which clock signal phase errors are corrected using two replicas of the 4:1 serializer of the output stage. Pulse shrinking is used to compare and equalize the outputs of these two replica serializers. A controller PHY was fabricated in 55nm CMOS. The PB-FFE increases the timing margin from 0.23UI to 0.29UI at 1067Mbps. At 2133Mbps, the read timing and voltage margins are 0.53UI and 211mV after read training, and the write margins are 0.72UI and 230mV after write training. To validate the QEC effectiveness, a prototype quarter-rate transmitter, including the QEC, was fabricated to another chip in 65nm CMOS. Adopting our QEC, the experimental results show that the output phase errors of the transmitter are reduced to a residual error of 0.8ps, and the output eye width and height are improved by 84% and 61%, respectively, at a data-rate of 12.8Gbps.본 연구에서 용량을 최대화하면서도 리프레시 전력을 최소화할 수 있는 새로운 메모리 구조인 관리형 DRAM 솔루션을 위한 컨트롤러 PHY를 제시하였다. 이와 같은 고용량 DRAM 인터페이스에서는 많은 DRAM 칩이 명령 / 주소 (C/A) 채널을 공유하고 있어서 심볼 간 간섭이 발생한다. 본 연구에서는 이러한 C/A 채널에서의 심볼 간 간섭을 줄이기 위해 펄스 기반 피드 포워드 이퀄라이저 (PB-FFE)를 채택하였다. 또한 본 연구의 컨트롤러 PHY는 DDR4 표준에 지정된 모든 트레이닝 시퀀스를 지원한다. 링크 트레이닝을 효율적으로 수행하고 트레이닝 시간을 줄이기 위해 글리치가 발생하지 않는 디지털 제어 지연 라인 (DCDL)을 채택하였다. 컨트롤러 PHY의 DQ 송신기는 출력 대기 시간을 줄이기 위해 쿼터 레이트 구조를 채택하였다. 쿼터 레이트 송신기의 경우에는 직교 클럭 간 위상 오류가 출력 신호의 무결성에 영향을 주게 된다. 이러한 영향을 최소화하기 위해 본 연구에서는 출력 단의 4 : 1 직렬 변환기의 두 복제본을 사용하여 클록 신호 위상 오류를 수정하는 QEC (Quadrature Error Corrector)를 제안하였다. 복제된 2개의 직렬 변환기의 출력을 비교하고 균등화하기 위해 펄스 수축 지연 라인이 사용되었다. 컨트롤러 PHY는 55nm CMOS 공정으로 제조되었다. PB-FFE는 1067Mbps에서 C/A 채널 타이밍 마진을 0.23UI에서 0.29UI로 증가시킨다. 읽기 트레이닝 후 읽기 타이밍 및 전압 마진은 2133Mbps에서 0.53UI 및 211mV이고, 쓰기 트레이닝 후 쓰기 마진은 0.72UI 및 230mV이다. QEC의 효과를 검증하기 위해 QEC를 포함한 프로토 타입 쿼터 레이트 송신기를 65nm CMOS의 다른 칩으로 제작하였다. QEC를 적용한 실험 결과, 송신기의 출력 위상 오류가 0.8ps의 잔류 오류로 감소하고, 출력 데이터 눈의 폭과 높이가 12.8Gbps의 데이터 속도에서 각각 84 %와 61 % 개선되었음을 보여준다.CHAPTER 1 INTRODUCTION 1 1.1 MOTIVATION 1 1.1.1 HEAVY LOAD C/A CHANNEL 5 1.1.2 QUARTER-RATE ARCHITECTURE IN DQ TRANSMITTER 7 1.1.3 SUMMARY 8 1.2 THESIS ORGANIZATION 10 CHAPTER 2 ARCHITECTURE 11 2.1 MDS DIMM STRUCTURE 11 2.2 MDS CONTROLLER 15 2.3 MDS CONTROLLER PHY 17 2.3.1 INITIALIZATION SEQUENCE 20 2.3.2 LINK TRAINING FINITE-STATE MACHINE 23 2.3.3 POWER DOWN MODE 28 CHAPTER 3 PULSE-BASED FEED-FORWARD EQUALIZER 29 3.1 COMMAND/ADDRESS CHANNEL 29 3.2 COMMAND/ADDRESS TRANSMITTER 33 3.3 PULSE-BASED FEED-FORWARD EQUALIZER 35 CHAPTER 4 CIRCUIT IMPLEMENTATION 39 4.1 BUILDING BLOCKS 39 4.1.1 ALL-DIGITAL PHASE-LOCKED LOOP (ADPLL) 39 4.1.2 ALL-DIGITAL DELAY-LOCKED LOOP (ADDLL) 44 4.1.3 GLITCH-FREE DCDL CONTROL 47 4.1.4 DUTY-CYCLE CORRECTOR (DCC) 50 4.1.5 DQ/DQS TRANSMITTER 52 4.1.6 DQ/DQS RECEIVER 54 4.1.7 ZQ CALIBRATION 56 4.2 MODELING AND VERIFICATION OF LINK TRAINING 59 4.3 BUILT-IN SELF-TEST CIRCUITS 66 CHAPTER 5 QUADRATURE ERROR CORRECTOR USING REPLICA SERIALIZERS AND PULSE-SHRINKING DELAY LINES 69 5.1 PHASE CORRECTION USING REPLICA SERIALIZERS AND PULSE-SHRINKING UNITS 69 5.2 OVERALL QEC ARCHITECTURE AND ITS OPERATION 71 5.3 FINE DELAY UNIT IN THE PSDL 76 CHAPTER 6 EXPERIMENTAL RESULTS 78 6.1 CONTROLLER PHY 78 6.2 PROTOTYPE QEC 88 CHAPTER 7 CONCLUSION 94 BIBLIOGRAPHY 96Docto

    Development of a Waveform Sampling ASIC with Femtosecond Timing for a Low Occupancy Vertex Detector.

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    Ph.D. Thesis. University of Hawaiʻi at Mānoa 2018

    Next generation optical access networks and coexistence with legacy PONs

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    Nowadays, Fiber-to-the-Home is one of the most promising solutions to provide broadband services in access networks. However, the fiber is inefficiently used as most of the deployed systems are still based on Time Division Multiplexing Passive Optical Networks (TDM-PONs) providing shared transmission capacities up to 2.5 Gb/s down and 1.25 Gb/s up, among multiple users. Research on high-speed electronics and Wavelength Division Multiplexing (WDM) has allowed the emergence of what is known as the second generation PON (NG-PON2), which specify aggregated capacities up to 40 Gb/s, stacking four channels at symmetric data rates of 10 Gb/s each, for residential scenarios. Nevertheless, the capacity per channel is still shared between multiple users due to the use of TDM. Moreover, the optical spectrum efficiency is low because channels are widely spaced (50 to 100 GHz). In addition, the sensitivity, reach and number of users is limited as consequence of using direct detection (DD) systems. In consequence, and due to the increase in bandwidth demands of new multimedia applications, it is necessary to propose solutions that cope with this tendency and, even more important, that can coexist with legacy systems, being one of the major requirements of network operators to guarantee a smooth and non-disruptive technology migration. In this thesis, a breakthrough technology such as Ultra-Dense WDM (UDWDM) that allows to allocate a large number of channels spaced only by a few GHz is used. This approach consent to envision the concept of Wavelength-to-the-User, where each costumer can be served with dedicated bandwidth links. The key technologies are based on coherent systems, with inherent wavelength selectivity and improved sensitivity compared to DD systems, thanks to the booster action of a tunable local oscillator (LO) laser. Because of cost is the main constraint in access networks, especially at the customer premises equipment (Optical Network Unit - ONU), in this thesis, a new class of coherent transceivers, based on low-cost direct modulated lasers and simplified receiver schemes, are proposed and experimentally tested. Moreover, the issue of coexistence is investigated through theoretical studies and real-time implementations, demonstrating full compatibility with legacy systems. Between the proposed solutions, a simple technique to adjust digitally the direct phase modulation of a distributed feedback (DFB) laser is presented to support flexible transmission rates. Next, several multilevel phase modulation formats for achieving higher transmission rates and better spectral efficiency are experimentally compared. Subsequently, the topic of photonic integration is addressed, demonstrating for the first time an 8-ary hybrid amplitude and phase modulated transmitter (Tx), by using a low-cost, small-footprint and energy efficient dual electro-absorption modulated laser (DEML). Finally, two novel proposals, to reduce the complexity of heterodyne and intradyne detection, are provided to face the typical issue of complexity and high-cost of coherent systems. The former explores the possibility of using only one DFB laser as LO and Tx at the ONU. The later demonstrates for the first time, a novel phase time diversity technique alternating phase modulation at each complex component (in-phase - I and quadrature - Q) achieving a 10 Gb/s' transmission with polarization independence.En la actualidad, la Fibra hasta el Hogar es una de las soluciones más prometedoras para proporcionar servicios de banda ancha en las redes de acceso. Sin embargo, la fibra se usa de manera poco eficiente, ya que la mayoría de los sistemas implementados todavía están basados en redes ópticas pasivas de multiplexación por división en el tiempo (TDM-PON) que brindan capacidades de transmisión compartidas entre múltiples usuarios de hasta 2.5 Gb/s y 1.25 Gb/s. La investigación en electrónica de alta velocidad y la multiplexación por división de longitud de onda (WDM) ha permitido el surgimiento de lo hoy se conoce como PON de segunda generación (NG-PON2), que especifica capacidades agregadas de hasta 40 Gb/s, apilando cuatro canales a velocidades de datos simétricas de 10 Gb/s cada uno, para escenarios residenciales. Sin embargo, la capacidad por canal todavía se comparte entre múltiples usuarios debido al uso de TDM. Además, la eficiencia en el uso del espectro óptico es baja porque los canales están muy separados (50 a 100 GHz). Asimismo, la sensibilidad, el alcance y el número de usuarios están limitados debido al uso de sistemas de detección directa. En consecuencia, y debido al aumento de las demandas de ancho de banda de las nuevas aplicaciones multimedia, es necesario proponer soluciones que respondan a esta tendencia y, lo que es más importante, que puedan coexistir con sistemas heredados, siendo uno de los principales requisitos de los operadores de red para garantizar una migración de tecnología fluida y sin interrupciones. En esta tesis, se utiliza una tecnología de vanguardia, como la multiplexación por división ultra densa de longitud de onda (UDWDM) que permite distribuir un gran número de canales espaciados solo por unos pocos GHz. Este enfoque permite vislumbrar el concepto de longitud de onda para el usuario, donde cada cliente puede usar enlaces de ancho de banda dedicados. Las tecnologías clave están basadas en los sistemas coherentes, con selectividad de longitud de onda inherente y sensibilidad mejorada en comparación con los sistemas de detección directa, gracias al efecto de amplificación óptica de un láser oscilador local (LO) sintonizable. Debido a que el costo es la principal restricción en las redes de acceso, especialmente del equipo en las instalaciones del cliente (unidad de red óptica - ONU), en ésta tesis, una nueva clase de transceptores coherentes, basados en láseres de bajo coste modulados directamente y esquemas de recepción simplificados, son propuestos y probados experimentalmente. Además, el problema de la coexistencia es investigado a través de estudios teóricos y experimentos en tiempo real, demostrando compatibilidad total con los sistemas heredados. Entre las soluciones propuestas, se presenta una técnica simple para ajustar digitalmente la modulación de fase directa de un láser de retroalimentación distribuida (DFB), y admitir velocidades de transmisión flexibles. Acto seguido, se comparan experimentalmente varios formatos multinivel de modulación de fase, para lograr tasas de transmisión más altas y una mejor eficiencia espectral. Posteriormente, se aborda el tema de la integración fotónica, demostrando por primera vez un transmisor (Tx) con modulación híbrida de fase y amplitud de ocho puntos, mediante el uso de un dispositivo pequeño, de bajo coste y eficiente energéticamente, como lo es el láser dual de electro-absorción modulada (DEML). Finalmente, se presentan dos propuestas novedosas para reducir la complejidad de la detección heterodina e intradina, afrontando el problema típico de la complejidad y alto coste de los sistemas coherentes. La primera explora la posibilidad de usar solo un láser DFB en la ONU, como LO y Tx. La segunda, demuestra por primera vez, una nueva técnica de diversidad fase en el tiempo, que alterna la modulación de fase en cada componente del plano complejo (fase-I y cuadratura-Q) logrando una transmisión de 10 Gb / s / λ con independencia de polarizació

    Next generation optical access networks and coexistence with legacy PONs

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    Nowadays, Fiber-to-the-Home is one of the most promising solutions to provide broadband services in access networks. However, the fiber is inefficiently used as most of the deployed systems are still based on Time Division Multiplexing Passive Optical Networks (TDM-PONs) providing shared transmission capacities up to 2.5 Gb/s down and 1.25 Gb/s up, among multiple users. Research on high-speed electronics and Wavelength Division Multiplexing (WDM) has allowed the emergence of what is known as the second generation PON (NG-PON2), which specify aggregated capacities up to 40 Gb/s, stacking four channels at symmetric data rates of 10 Gb/s each, for residential scenarios. Nevertheless, the capacity per channel is still shared between multiple users due to the use of TDM. Moreover, the optical spectrum efficiency is low because channels are widely spaced (50 to 100 GHz). In addition, the sensitivity, reach and number of users is limited as consequence of using direct detection (DD) systems. In consequence, and due to the increase in bandwidth demands of new multimedia applications, it is necessary to propose solutions that cope with this tendency and, even more important, that can coexist with legacy systems, being one of the major requirements of network operators to guarantee a smooth and non-disruptive technology migration. In this thesis, a breakthrough technology such as Ultra-Dense WDM (UDWDM) that allows to allocate a large number of channels spaced only by a few GHz is used. This approach consent to envision the concept of Wavelength-to-the-User, where each costumer can be served with dedicated bandwidth links. The key technologies are based on coherent systems, with inherent wavelength selectivity and improved sensitivity compared to DD systems, thanks to the booster action of a tunable local oscillator (LO) laser. Because of cost is the main constraint in access networks, especially at the customer premises equipment (Optical Network Unit - ONU), in this thesis, a new class of coherent transceivers, based on low-cost direct modulated lasers and simplified receiver schemes, are proposed and experimentally tested. Moreover, the issue of coexistence is investigated through theoretical studies and real-time implementations, demonstrating full compatibility with legacy systems. Between the proposed solutions, a simple technique to adjust digitally the direct phase modulation of a distributed feedback (DFB) laser is presented to support flexible transmission rates. Next, several multilevel phase modulation formats for achieving higher transmission rates and better spectral efficiency are experimentally compared. Subsequently, the topic of photonic integration is addressed, demonstrating for the first time an 8-ary hybrid amplitude and phase modulated transmitter (Tx), by using a low-cost, small-footprint and energy efficient dual electro-absorption modulated laser (DEML). Finally, two novel proposals, to reduce the complexity of heterodyne and intradyne detection, are provided to face the typical issue of complexity and high-cost of coherent systems. The former explores the possibility of using only one DFB laser as LO and Tx at the ONU. The later demonstrates for the first time, a novel phase time diversity technique alternating phase modulation at each complex component (in-phase - I and quadrature - Q) achieving a 10 Gb/s' transmission with polarization independence.En la actualidad, la Fibra hasta el Hogar es una de las soluciones más prometedoras para proporcionar servicios de banda ancha en las redes de acceso. Sin embargo, la fibra se usa de manera poco eficiente, ya que la mayoría de los sistemas implementados todavía están basados en redes ópticas pasivas de multiplexación por división en el tiempo (TDM-PON) que brindan capacidades de transmisión compartidas entre múltiples usuarios de hasta 2.5 Gb/s y 1.25 Gb/s. La investigación en electrónica de alta velocidad y la multiplexación por división de longitud de onda (WDM) ha permitido el surgimiento de lo hoy se conoce como PON de segunda generación (NG-PON2), que especifica capacidades agregadas de hasta 40 Gb/s, apilando cuatro canales a velocidades de datos simétricas de 10 Gb/s cada uno, para escenarios residenciales. Sin embargo, la capacidad por canal todavía se comparte entre múltiples usuarios debido al uso de TDM. Además, la eficiencia en el uso del espectro óptico es baja porque los canales están muy separados (50 a 100 GHz). Asimismo, la sensibilidad, el alcance y el número de usuarios están limitados debido al uso de sistemas de detección directa. En consecuencia, y debido al aumento de las demandas de ancho de banda de las nuevas aplicaciones multimedia, es necesario proponer soluciones que respondan a esta tendencia y, lo que es más importante, que puedan coexistir con sistemas heredados, siendo uno de los principales requisitos de los operadores de red para garantizar una migración de tecnología fluida y sin interrupciones. En esta tesis, se utiliza una tecnología de vanguardia, como la multiplexación por división ultra densa de longitud de onda (UDWDM) que permite distribuir un gran número de canales espaciados solo por unos pocos GHz. Este enfoque permite vislumbrar el concepto de longitud de onda para el usuario, donde cada cliente puede usar enlaces de ancho de banda dedicados. Las tecnologías clave están basadas en los sistemas coherentes, con selectividad de longitud de onda inherente y sensibilidad mejorada en comparación con los sistemas de detección directa, gracias al efecto de amplificación óptica de un láser oscilador local (LO) sintonizable. Debido a que el costo es la principal restricción en las redes de acceso, especialmente del equipo en las instalaciones del cliente (unidad de red óptica - ONU), en ésta tesis, una nueva clase de transceptores coherentes, basados en láseres de bajo coste modulados directamente y esquemas de recepción simplificados, son propuestos y probados experimentalmente. Además, el problema de la coexistencia es investigado a través de estudios teóricos y experimentos en tiempo real, demostrando compatibilidad total con los sistemas heredados. Entre las soluciones propuestas, se presenta una técnica simple para ajustar digitalmente la modulación de fase directa de un láser de retroalimentación distribuida (DFB), y admitir velocidades de transmisión flexibles. Acto seguido, se comparan experimentalmente varios formatos multinivel de modulación de fase, para lograr tasas de transmisión más altas y una mejor eficiencia espectral. Posteriormente, se aborda el tema de la integración fotónica, demostrando por primera vez un transmisor (Tx) con modulación híbrida de fase y amplitud de ocho puntos, mediante el uso de un dispositivo pequeño, de bajo coste y eficiente energéticamente, como lo es el láser dual de electro-absorción modulada (DEML). Finalmente, se presentan dos propuestas novedosas para reducir la complejidad de la detección heterodina e intradina, afrontando el problema típico de la complejidad y alto coste de los sistemas coherentes. La primera explora la posibilidad de usar solo un láser DFB en la ONU, como LO y Tx. La segunda, demuestra por primera vez, una nueva técnica de diversidad fase en el tiempo, que alterna la modulación de fase en cada componente del plano complejo (fase-I y cuadratura-Q) logrando una transmisión de 10 Gb / s / λ con independencia de polarizaciónPostprint (published version

    The Design of Low Power Ultra-Wideband Transceiver

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    Ph.DDOCTOR OF PHILOSOPH

    고속 시리얼 링크를 위한 고리 발진기를 기반으로 하는 주파수 합성기

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    학위논문(박사) -- 서울대학교대학원 : 공과대학 전기·정보공학부, 2022. 8. 정덕균.In this dissertation, major concerns in the clocking of modern serial links are discussed. As sub-rate, multi-standard architectures are becoming predominant, the conventional clocking methodology seems to necessitate innovation in terms of low-cost implementation. Frequency synthesis with active, inductor-less oscillators replacing LC counterparts are reviewed, and solutions for two major drawbacks are proposed. Each solution is verified by prototype chip design, giving a possibility that the inductor-less oscillator may become a proper candidate for future high-speed serial links. To mitigate the high flicker noise of a high-frequency ring oscillator (RO), a reference multiplication technique that effectively extends the bandwidth of the following all-digital phase-locked loop (ADPLL) is proposed. The technique avoids any jitter accumulation, generating a clean mid-frequency clock, overall achieving high jitter performance in conjunction with the ADPLL. Timing constraint for the proper reference multiplication is first analyzed to determine the calibration points that may correct the existent phase errors. The weight for each calibration point is updated by the proposed a priori probability-based least-mean-square (LMS) algorithm. To minimize the time required for the calibration, each gain for the weight update is adaptively varied by deducing a posteriori which error source dominates the others. The prototype chip is fabricated in a 40-nm CMOS technology, and its measurement results verify the low-jitter, high-frequency clock generation with fast calibration settling. The presented work achieves an rms jitter of 177/223 fs at 8/16-GHz output, consuming 12.1/17-mW power. As the second embodiment, an RO-based ADPLL with an analog technique that addresses the high supply sensitivity of the RO is presented. Unlike prior arts, the circuit for the proposed technique does not extort the RO voltage headroom, allowing high-frequency oscillation. Further, the performance given from the technique is robust over process, voltage, and temperature (PVT) variations, avoiding the use of additional calibration hardware. Lastly, a comprehensive analysis of phase noise contribution is conducted for the overall ADPLL, followed by circuit optimizations, to retain the low-jitter output. Implemented in a 40-nm CMOS technology, the frequency synthesizer achieves an rms jitter of 289 fs at 8 GHz output without any injected supply noise. Under a 20-mVrms white supply noise, the ADPLL suppresses supply-noise-induced jitter by -23.8 dB.본 논문은 현대 시리얼 링크의 클락킹에 관여되는 주요한 문제들에 대하여 기술한다. 준속도, 다중 표준 구조들이 채택되고 있는 추세에 따라, 기존의 클라킹 방법은 낮은 비용의 구현의 관점에서 새로운 혁신을 필요로 한다. LC 공진기를 대신하여 능동 소자 발진기를 사용한 주파수 합성에 대하여 알아보고, 이에 발생하는 두가지 주요 문제점과 각각에 대한 해결 방안을 탐색한다. 각 제안 방법을 프로토타입 칩을 통해 그 효용성을 검증하고, 이어서 능동 소자 발진기가 미래의 고속 시리얼 링크의 클락킹에 사용될 가능성에 대해 검토한다. 첫번째 시연으로써, 고주파 고리 발진기의 높은 플리커 잡음을 완화시키기 위해 기준 신호를 배수화하여 뒷단의 위상 고정 루프의 대역폭을 효과적으로 극대화 시키는 회로 기술을 제안한다. 본 기술은 지터를 누적 시키지 않으며 따라서 깨끗한 중간 주파수 클락을 생성시켜 위상 고정 루프와 함께 높은 성능의 고주파 클락을 합성한다. 기준 신호를 성공적으로 배수화하기 위한 타이밍 조건들을 먼저 분석하여 타이밍 오류를 제거하기 위한 방법론을 파악한다. 각 교정 중량은 연역적 확률을 기반으로한 LMS 알고리즘을 통해 갱신되도록 설계된다. 교정에 필요한 시간을 최소화 하기 위하여, 각 교정 이득은 타이밍 오류 근원들의 크기를 귀납적으로 추론한 값을 바탕으로 지속적으로 제어된다. 40-nm CMOS 공정으로 구현된 프로토타입 칩의 측정을 통해 저소음, 고주파 클락을 빠른 교정 시간안에 합성해 냄을 확인하였다. 이는 177/223 fs의 rms 지터를 가지는 8/16 GHz의 클락을 출력한다. 두번째 시연으로써, 고리 발진기의 높은 전원 노이즈 의존성을 완화시키는 기술이 포함된 주파수 합성기가 설계되었다. 이는 고리 발진기의 전압 헤드룸을 보존함으로서 고주파 발진을 가능하게 한다. 나아가, 전원 노이즈 감소 성능은 공정, 전압, 온도 변동에 대하여 민감하지 않으며, 따라서 추가적인 교정 회로를 필요로 하지 않는다. 마지막으로, 위상 노이즈에 대한 포괄적 분석과 회로 최적화를 통하여 주파수 합성기의 저잡음 출력을 방해하지 않는 방법을 고안하였다. 해당 프로토타입 칩은 40-nm CMOS 공정으로 구현되었으며, 전원 노이즈가 인가되지 않은 상태에서 289 fs의 rms 지터를 가지는 8 GHz의 클락을 출력한다. 또한, 20 mVrms의 전원 노이즈가 인가되었을 때에 유도되는 지터의 양을 -23.8 dB 만큼 줄이는 것을 확인하였다.1 Introduction 1 1.1 Motivation 3 1.1.1 Clocking in High-Speed Serial Links 4 1.1.2 Multi-Phase, High-Frequency Clock Conversion 8 1.2 Dissertation Objectives 10 2 RO-Based High-Frequency Synthesis 12 2.1 Phase-Locked Loop Fundamentals 12 2.2 Toward All-Digital Regime 15 2.3 RO Design Challenges 21 2.3.1 Oscillator Phase Noise 21 2.3.2 Challenge 1: High Flicker Noise 23 2.3.3 Challenge 2: High Supply Noise Sensitivity 26 3 Filtering RO Noise 28 3.1 Introduction 28 3.2 Proposed Reference Octupler 34 3.2.1 Delay Constraint 34 3.2.2 Phase Error Calibration 38 3.2.3 Circuit Implementation 51 3.3 IL-ADPLL Implementation 55 3.4 Measurement Results 59 3.5 Summary 63 4 RO Supply Noise Compensation 69 4.1 Introduction 69 4.2 Proposed Analog Closed Loop for Supply Noise Compensation 72 4.2.1 Circuit Implementation 73 4.2.2 Frequency-Domain Analysis 76 4.2.3 Circuit Optimization 81 4.3 ADPLL Implementation 87 4.4 Measurement Results 90 4.5 Summary 98 5 Conclusions 99 A Notes on the 8REF 102 B Notes on the ACSC 105박
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