Noise Efficient Integrated Amplifier Designs for Biomedical Applications

The recording of neural signals with small monolithically integrated amplifiers is of high interest in research as well as in commercial applications, where it is common to acquire 100 or more channels in parallel. This paper reviews the recent developments in low-noise biomedical amplifier design based on CMOS technology, including lateral bipolar devices. Seven major circuit topology categories are identified and analyzed on a per-channel basis in terms of their noise-efficiency factor (NEF), input-referred absolute noise, current consumption, and area. A historical trend towards lower NEF is observed whilst absolute noise power and current consumption exhibit a widespread over more than five orders of magnitude. The performance of lateral bipolar transistors as amplifier input devices is examined by transistor-level simulations and measurements from five different prototype designs fabricated in 180 nm and 350 nm CMOS technology. The lowest measured noise floor is 9.9 nV/√Hz with a 10 µA bias current, which results in a NEF of 1.2

Low-Noise Micro-Power Amplifiers for Biosignal Acquisition

There are many different types of biopotential signals, such as action potentials (APs), local field potentials (LFPs), electromyography (EMG), electrocardiogram (ECG), electroencephalogram (EEG), etc. Nerve action potentials play an important role for the analysis of human cognition, such as perception, memory, language, emotions, and motor control. EMGs provide vital information about the patients which allow clinicians to diagnose and treat many neuromuscular diseases, which could result in muscle paralysis, motor problems, etc. EEGs is critical in diagnosing epilepsy, sleep disorders, as well as brain tumors. Biopotential signals are very weak, which requires the biopotential amplifier to exhibit low input-referred noise. For example, EEGs have amplitudes from 1 μV [microvolt] to 100 μV [microvolt] with much of the energy in the sub-Hz [hertz] to 100 Hz [hertz] band. APs have amplitudes up to 500 μV [microvolt] with much of the energy in the 100 Hz [hertz] to 7 kHz [hertz] band. In wearable/implantable systems, the low-power operation of the biopotential amplifier is critical to avoid thermal damage to surrounding tissues, preserve long battery life, and enable wirelessly-delivered or harvested energy supply. For an ideal thermal-noise-limited amplifier, the amplifier power is inversely proportional to the input-referred noise of the amplifier. Therefore, there is a noise-power trade-off which must be well-balanced by the designers. In this work I propose novel amplifier topologies, which are able to significantly improve the noise-power efficiency by increasing the effective transconductance at a given current. In order to reject the DC offsets generated at the tissue-electrode interface, energy-efficient techniques are employed to create a low-frequency high-pass cutoff. The noise contribution of the high-pass cutoff circuitry is minimized by using power-efficient configurations, and optimizing the biasing and dimension of the devices. Sufficient common-mode rejection ratio (CMRR) and power supply rejection ratio (PSRR) are achieved to suppress common-mode interferences and power supply noises. Our design are fabricated in standard CMOS processes. The amplifiers’ performance are measured on the bench, and also demonstrated with biopotential recordings

VLSI Circuits for Bidirectional Neural Interfaces

Medical devices that deliver electrical stimulation to neural tissue are important clinical tools that can augment or replace pharmacological therapies. The success of such devices has led to an explosion of interest in the field, termed neuromodulation, with a diverse set of disorders being targeted for device-based treatment. Nevertheless, a large degree of uncertainty surrounds how and why these devices are effective. This uncertainty limits the ability to optimize therapy and gives rise to deleterious side effects. An emerging approach to improve neuromodulation efficacy and to better understand its mechanisms is to record bioelectric activity during stimulation. Understanding how stimulation affects electrophysiology can provide insights into disease, and also provides a feedback signal to autonomously tune stimulation parameters to improve efficacy or decrease side-effects. The aims of this work were taken up to advance the state-of-the-art in neuro-interface technology to enable closed-loop neuromodulation therapies. Long term monitoring of neuronal activity in awake and behaving subjects can provide critical insights into brain dynamics that can inform system-level design of closed-loop neuromodulation systems. Thus, first we designed a system that wirelessly telemetered electrocorticography signals from awake-behaving rats. We hypothesized that such a system could be useful for detecting sporadic but clinically relevant electrophysiological events. In an 18-hour, overnight recording, seizure activity was detected in a pre-clinical rodent model of global ischemic brain injury. We subsequently turned to the design of neurostimulation circuits. Three critical features of neurostimulation devices are safety, programmability, and specificity. We conceived and implemented a neurostimulator architecture that utilizes a compact on-chip circuit for charge balancing (safety), digital-to-analog converter calibration (programmability) and current steering (specificity). Charge balancing accuracy was measured at better than 0.3%, the digital-to-analog converters achieved 8-bit resolution, and physiological effects of current steering stimulation were demonstrated in an anesthetized rat. Lastly, to implement a bidirectional neural interface, both the recording and stimulation circuits were fabricated on a single chip. In doing so, we implemented a low noise, ultra-low power recording front end with a high dynamic range. The recording circuits achieved a signal-to-noise ratio of 58 dB and a spurious-free dynamic range of better than 70 dB, while consuming 5.5 μW per channel. We demonstrated bidirectional operation of the chip by recording cardiac modulation induced through vagus nerve stimulation, and demonstrated closed-loop control of cardiac rhythm

Ultra-low power mixed-signal frontend for wearable EEGs

Electronics circuits are ubiquitous in daily life, aided by advancements in the chip design industry, leading to miniaturised solutions for typical day to day problems. One of the critical healthcare areas helped by this advancement in technology is electroencephalography (EEG). EEG is a non-invasive method of tracking a person's brain waves, and a crucial tool in several healthcare contexts, including epilepsy and sleep disorders. Current ambulatory EEG systems still suffer from limitations that affect their usability. Furthermore, many patients admitted to emergency departments (ED) for a neurological disorder like altered mental status or seizures, would remain undiagnosed hours to days after admission, which leads to an elevated rate of death compared to other conditions. Conducting a thorough EEG monitoring in early-stage could prevent further damage to the brain and avoid high mortality. But lack of portability and ease of access results in a long wait time for the prescribed patients. All real signals are analogue in nature, including brainwaves sensed by EEG systems. For converting the EEG signal into digital for further processing, a truly wearable EEG has to have an analogue mixed-signal front-end (AFE). This research aims to define the specifications for building a custom AFE for the EEG recording and use that to review the suitability of the architectures available in the literature. Another critical task is to provide new architectures that can meet the developed specifications for EEG monitoring and can be used in epilepsy diagnosis, sleep monitoring, drowsiness detection and depression study. The thesis starts with a preview on EEG technology and available methods of brainwaves recording. It further expands to design requirements for the AFE, with a discussion about critical issues that need resolving. Three new continuous-time capacitive feedback chopped amplifier designs are proposed. A novel calibration loop for setting the accurate value for a pseudo-resistor, which is a crucial block in the proposed topology, is also discussed. This pseudoresistor calibration loop achieved the resistor variation of under 8.25%. The thesis also presents a new design of a curvature corrected bandgap, as well as a novel DDA based fourth-order Sallen-Key filter. A modified sensor frontend architecture is then proposed, along with a detailed analysis of its implementation. Measurement results of the AFE are finally presented. The AFE consumed a total power of 3.2A (including ADC, amplifier, filter, and current generation circuitry) with the overall integrated input-referred noise of 0.87V-rms in the frequency band of 0.5-50Hz. Measurement results confirmed that only the proposed AFE achieved all defined specifications for the wearable EEG system with the smallest power consumption than state-of-art architectures that meet few but not all specifications. The AFE also achieved a CMRR of 131.62dB, which is higher than any studied architectures.Open Acces

Integrated Circuits and Systems for Smart Sensory Applications

Connected intelligent sensing reshapes our society by empowering people with increasing new ways of mutual interactions. As integration technologies keep their scaling roadmap, the horizon of sensory applications is rapidly widening, thanks to myriad light-weight low-power or, in same cases even self-powered, smart devices with high-connectivity capabilities. CMOS integrated circuits technology is the best candidate to supply the required smartness and to pioneer these emerging sensory systems. As a result, new challenges are arising around the design of these integrated circuits and systems for sensory applications in terms of low-power edge computing, power management strategies, low-range wireless communications, integration with sensing devices. In this Special Issue recent advances in application-specific integrated circuits (ASIC) and systems for smart sensory applications in the following five emerging topics: (I) dedicated short-range communications transceivers; (II) digital smart sensors, (III) implantable neural interfaces, (IV) Power Management Strategies in wireless sensor nodes and (V) neuromorphic hardware

Low-Power Low-Noise CMOS Analog and Mixed-Signal Design towards Epileptic Seizure Detection

About 50 million people worldwide suffer from epilepsy and one third of them have seizures that are refractory to medication. In the past few decades, deep brain stimulation (DBS) has been explored by researchers and physicians as a promising way to control and treat epileptic seizures. To make the DBS therapy more efficient and effective, the feedback loop for titrating therapy is required. It means the implantable DBS devices should be smart enough to sense the brain signals and then adjust the stimulation parameters adaptively. This research proposes a signal-sensing channel configurable to various neural applications, which is a vital part for a future closed-loop epileptic seizure stimulation system. This doctoral study has two main contributions, 1) a micropower low-noise neural front-end circuit, and 2) a low-power configurable neural recording system for both neural action-potential (AP) and fast-ripple (FR) signals. The neural front end consists of a preamplifier followed by a bandpass filter (BPF). This design focuses on improving the noise-power efficiency of the preamplifier and the power/pole merit of the BPF at ultra-low power consumption. In measurement, the preamplifier exhibits 39.6-dB DC gain, 0.8 Hz to 5.2 kHz of bandwidth (BW), 5.86-μVrms input-referred noise in AP mode, while showing 39.4-dB DC gain, 0.36 Hz to 1.3 kHz of BW, 3.07-μVrms noise in FR mode. The preamplifier achieves noise efficiency factor (NEF) of 2.93 and 3.09 for AP and FR modes, respectively. The preamplifier power consumption is 2.4 μW from 2.8 V for both modes. The 6th-order follow-the-leader feedback elliptic BPF passes FR signals and provides -110 dB/decade attenuation to out-of-band interferers. It consumes 2.1 μW from 2.8 V (or 0.35 μW/pole) and is one of the most power-efficient high-order active filters reported to date. The complete front-end circuit achieves a mid-band gain of 38.5 dB, a BW from 250 to 486 Hz, and a total input-referred noise of 2.48 μVrms while consuming 4.5 μW from the 2.8 V power supply. The front-end NEF achieved is 7.6. The power efficiency of the complete front-end is 0.75 μW/pole. The chip is implemented in a standard 0.6-μm CMOS process with a die area of 0.45 mm^2. The neural recording system incorporates the front-end circuit and a sigma-delta analog-to-digital converter (ADC). The ADC has scalable BW and power consumption for digitizing both AP and FR signals captured by the front end. Various design techniques are applied to the improvement of power and area efficiency for the ADC. At 77-dB dynamic range (DR), the ADC has a peak SNR and SNDR of 75.9 dB and 67 dB, respectively, while consuming 2.75-mW power in AP mode. It achieves 78-dB DR, 76.2-dB peak SNR, 73.2-dB peak SNDR, and 588-μW power consumption in FR mode. Both analog and digital power supply voltages are 2.8 V. The chip is fabricated in a standard 0.6-μm CMOS process. The die size is 11.25 mm^2. The proposed circuits can be extended to a multi-channel system, with the ADC shared by all channels, as the sensing part of a future closed-loop DBS system for the treatment of intractable epilepsy

A high-performance 8 nV/root Hz 8-channel wearable and wireless system for real-time monitoring of bioelectrical signals

Background: It is widely accepted by the scientific community that bioelectrical signals, which can be used for the identification of neurophysiological biomarkers indicative of a diseased or pathological state, could direct patient treatment towards more effective therapeutic strategies. However, the design and realisation of an instrument that can precisely record weak bioelectrical signals in the presence of strong interference stemming from a noisy clinical environment is one of the most difficult challenges associated with the strategy of monitoring bioelectrical signals for diagnostic purposes. Moreover, since patients often have to cope with the problem of limited mobility being connected to bulky and mains-powered instruments, there is a growing demand for small-sized, high-performance and ambulatory biopotential acquisition systems in the Intensive Care Unit (ICU) and in High-dependency wards. Finally, to the best of our knowledge, there are no commercial, small, battery-powered, wearable and wireless recording-only instruments that claim the capability of recording electrocorticographic (ECoG) signals. Methods: To address this problem, we designed and developed a low-noise (8 nV/√Hz), eight-channel, battery-powered, wearable and wireless instrument (55 × 80 mm2). The performance of the realised instrument was assessed by conducting both ex vivo and in vivo experiments. Results: To provide ex vivo proof-of-function, a wide variety of high-quality bioelectrical signal recordings are reported, including electroencephalographic (EEG), electromyographic (EMG), electrocardiographic (ECG), acceleration signals, and muscle fasciculations. Low-noise in vivo recordings of weak local field potentials (LFPs), which were wirelessly acquired in real time using segmented deep brain stimulation (DBS) electrodes implanted in the thalamus of a non-human primate, are also presented. Conclusions: The combination of desirable features and capabilities of this instrument, namely its small size (~one business card), its enhanced recording capabilities, its increased processing capabilities, its manufacturability (since it was designed using discrete off-the-shelf components), the wide bandwidth it offers (0.5 – 500 Hz) and the plurality of bioelectrical signals it can precisely record, render it a versatile and reliable tool to be utilized in a wide range of applications and environments

Implantable Asynchronous Epilectic Seizure Detector

RÉSUMÉ Plusieurs algorithmes de détection à faible consommation ont été proposés pour le traitement de l'épilepsie focale. La gestion de l'énergie dans ces microsystèmes est une question importante qui dépend principalement de la charge et de la décharge des capacités parasites des transistors et des courants de court-circuit pendant les commutations. Dans ce mémoire, un détecteur asynchrone de crise pour le traitement de l'épilepsie focale est présenté. Ce système fait partie d'un dispositif implantable intégré pour stopper la propagation de la crise. L'objectif de ce travail est de réduire la dissipation de puissance en évitant les transitions inutiles de signaux grâce à la technique du « clock tree » ; en conséquence, les transistors ne changent pas d'état transitoire dans ce mode d'économie d'énergie (période de surveillance des EEG intracrâniens), sauf si un événement anormal est détecté. Le dispositif intégré proposé comporte un bio-amplificateur en amont (front-end) à faible bruit, un processeur de signal numérique et un détecteur. Un délai variable et quatre détecteurs de fenêtres de tensions variables en parallèles sont utilisés pour extraire de l’information sur le déclenchement des crises. La sensibilité du détecteur est améliorée en optimisant les paramètres variables en fonction des activités de foyers épileptiques de chaque patient lors du début des crises. Le détecteur de crises asynchrone proposé a été implémenté premièrement en tant que prototype sur un circuit imprimé circulaire, ensuite nous l’avons intégré sur une seule puce dans la technologie standard CMOS 0.13μm. La puce fabriquée a été validée in vitro en utilisant un total de 34 enregistrements EEG intracrâniens avec la durée moyenne de chaque enregistrement de 1 min. Parmi ces jeux de données, 15 d’entre eux correspondaient à des enregistrements de crises, tandis que les 19 autres provenaient d’enregistrements variables de patients tels que de brèves crises électriques, des mouvements du corps et des variations durant le sommeil. Le système proposé a réalisé une performance de détection précise avec une sensibilité de 100% et 100% de spécificité pour ces 34 signaux icEEG enregistrés. Le délai de détection moyen était de 13,7 s après le début de la crise, bien avant l'apparition des manifestations cliniques, et une consommation d'énergie de 9 µW a été obtenue à partir d'essais expérimentaux.----------ABSTRACT Several power efficient detection algorithms have been proposed for treatment of focal epilepsy. Power management in these microsystems is an important issue which is mainly dependent on charging and discharging of the parasitic capacitances in transistors and short-circuit currents during switching. In this thesis, an asynchronous seizure detector for treatment of the focal epilepsy is presented. This system is part of an implantable integrated device to block the seizure progression. The objective of this work is reducing the power dissipation by avoiding the unnecessary signal transition and clock tree; as a result, transistors do not change their transient state in power saving mode (icEEG monitoring period) unless an abnormal event detected. The proposed integrated device contains a low noise front-end bioamplifier, a digital signal processor and a detector. A variable time frame and four concurrent variable voltage window detectors are used to extract seizure onset information. The sensitivity of the detector is enhanced by optimizing the variable parameters based on specific electrographic seizure onset activities of each patient. The proposed asynchronous seizure detector was first implemented as a prototype on a PCB and then integrated in standard 0.13 μm CMOS process. The fabricated chip was validated offline using a total of 34 intracranial EEG recordings with the average time duration of 1 min. 15 of these datasets corresponded to seizure activities while the remaining 19 signals were related to variable patient activities such as brief electrical seizures, body movement, and sleep patterns. The proposed system achieved an accurate detection performance with 100% sensitivity and 100 % specificity for these 34 recorded icEEG signals. The average detection delay was 13.7 s after seizure onset, well before the onset of the clinical manifestations. Finally, power consumption of the chip is 9 µW obtained from experimental tests

Implantable Micro-Device for Epilepsy Seizure Detection and Subsequent Treatment

RÉSUMÉ L’émergence des micro-dispositifs implantables est une voie prometteuse pour le traitement de troubles neurologiques. Ces systèmes biomédicaux ont été exploités comme traitements non-conventionnels sur des patients chez qui les remèdes habituels sont inefficaces. Les récents progrès qui ont été faits sur les interfaces neuronales directes ont permis aux chercheurs d’analyser l’activité EEG intracérébrale (icEEG) en temps réel pour des fins de traitements. Cette thèse présente un dispositif implantable à base de microsystèmes pouvant capter efficacement des signaux neuronaux, détecter des crises d’épilepsie et y apporter un traitement afin de l’arrêter. Les contributions principales présentées ici ont été rapportées dans cinq articles scientifiques, publiés ou acceptés pour publication dans les revues IEEE, et plusieurs autres tels que «Low Power Electronics» et «Emerging Technologies in Computing». Le microsystème proposé inclus un circuit intégré (CI) à faible consommation énergétique permettant la détection de crises d’épilepsie en temps réel. Cet CI comporte une pré-amplification initiale et un détecteur de crises d’épilepsie. Le pré-amplificateur est constitué d’une nouvelle topologie de stabilisateur d’hacheur réduisant le bruit et la puissance dissipée. Les CI fabriqués ont été testés sur des enregistrements d’icEEG provenant de sept patients épileptiques réfractaires au traitement antiépileptique. Le délai moyen de la détection d’une crise est de 13,5 secondes, soit avant le début des manifestations cliniques évidentes. La consommation totale d’énergie mesurée de cette puce est de 51 μW. Un neurostimulateur à boucle fermée (NSBF), quant à lui, détecte automatiquement les crises en se basant sur les signaux icEEG captés par des électrodes intracrâniennes et permet une rétroaction par une stimulation électrique au même endroit afin d’interrompre ces crises. La puce de détection de crises et le stimulateur électrique à base sur FPGA ont été assemblés à des électrodes afin de compléter la prothèse proposée. Ce NSBF a été validé en utilisant des enregistrements d’icEEG de dix patients souffrant d’épilepsie réfractaire. Les résultats révèlent une performance excellente pour la détection précoce de crises et pour l’auto-déclenchement subséquent d’une stimulation électrique. La consommation énergétique totale du NSBF est de 16 mW. Une autre alternative à la stimulation électrique est l’injection locale de médicaments, un traitement prometteur de l’épilepsie. Un système local de livraison de médicament basé sur un nouveau détecteur asynchrone des crises est présenté.----------ABSTRACT Emerging implantable microdevices hold great promise for the treatment of patients with neurological conditions. These biomedical systems have been exploited as unconventional treatment for the conventionally untreatable patients. Recent progress in brain-machine-interface activities has led the researchers to analyze the intracerebral EEG (icEEG) recording in real-time and deliver subsequent treatments. We present in this thesis a long-term safe and reliable low-power microsystem-based implantable device to perform efficient neural signal recording, seizure detection and subsequent treatment for epilepsy. The main contributions presented in this thesis are reported in five journal manuscripts, published or accepted for publication in IEEE Journals, and many others such as Low Power Electronics, and Emerging Technologies in Computing. The proposed microsystem includes a low-power integrated circuit (IC) intended for real-time epileptic seizure detection. This IC integrates a front-end preamplifier and epileptic seizure detector. The preamplifier is based on a new chopper stabilizer topology that reduces noise and power dissipation. The fabricated IC was tested using icEEG recordings from seven patients with drug-resistant epilepsy. The average seizure detection delay was 13.5 sec, well before the onset of clinical manifestations. The measured total power consumption of this chip is 51 µW. A closed-loop neurostimulator (CLNS) is next introduced, which is dedicated to automatically detect seizure based on icEEG recordings from intracranial electrode contacts and provide an electrical stimulation feedback to the same contacts in order to disrupt these seizures. The seizure detector chip and a dedicated FPGA-based electrical stimulator were assembled together with common recording electrodes to complete the proposed prosthesis. This CLNS was validated offline using recording from ten patients with refractory epilepsy, and showed excellent performance for early detection of seizures and subsequent self-triggering electrical stimulation. Total power consumption of the CLNS is 16 mW. Alternatively, focal drug injection is the promising treatment for epilepsy. A responsive focal drug delivery system based on a new asynchronous seizure detector is also presented. The later system with data-dependent computation reduces up to 49% power consumption compared to the previous synchronous neurostimulator

Nano-Watt Modular Integrated Circuits for Wireless Neural Interface.

In this work, a nano-watt modular neural interface circuit is proposed for ECoG neuroprosthetics. The main purposes of this work are threefold: (1) optimizing the power-performance of the neural interface circuits based on ECoG signal characteristics, (2) equipping a stimulation capability, and (3) providing a modular system solution to expand functionality. To achieve these aims, the proposed system introduces the following contributions/innovations: (1) power-noise optimization based on the ECoG signal driven analysis, (2) extreme low-power analog front-ends, (3) Manchester clock-edge modulation clock data recovery, (4) power-efficient data compression, (5) integrated stimulator with fully programmable waveform, (6) wireless signal transmission through skin, and (7) modular expandable design. Towards these challenges and contributions, three different ECoG neural interface systems, ENI-1, ENI-16, and ENI-32, have been designed, fabricated, and tested. The first ENI system(ENI-1) is a one-channel analog front-end and fabricated in a 0.25µm CMOS process with chopper stabilized pseudo open-loop preamplifier and area-efficient SAR ADC. The measured channel power, noise and area are 1.68µW at 2.5V power-supply, 1.69µVrms (NEF=2.43), and 0.0694mm^2, respectively. The fabricated IC is packaged with customized miniaturized package. In-vivo human EEG is successfully measured with the fabricated ENI-1-IC. To demonstrate a system expandability and wireless link, ENI-16 IC is fabricated in 0.25µm CMOS process and has sixteen channels with a push-pull preamplifier, asynchronous SAR ADC, and intra-skin communication(ISCOM) which is a new way of transmitting the signal through skin. The measured channel power, noise and area are 780nW, 4.26µVrms (NEF=5.2), and 2.88mm^2, respectively. With the fabricated ENI-16-IC, in-vivo epidural ECoG from monkey is successfully measured. As a closed-loop system, ENI-32 focuses on optimizing the power performance based on a bio-signal property and integrating stimulator. ENI-32 is fabricated in 0.18µm CMOS process and has thirty-two recording channels and four stimulation channels with a cyclic preamplifier, data compression, asymmetric wireless transceiver (Tx/Rx). The measured channel power, noise and area are 140nW (680nW including ISCOM), 3.26µVrms (NEF=1.6), and 5.76mm^2, respectively. The ENI-32 achieves an order of magnitude power reduction while maintaining the system performance. The proposed nano-watt ENI-32 can be the first practical wireless closed-loop solution with a practically miniaturized implantable device.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/98064/1/schang_1.pd