Design Techniques for Energy Efficient Multi-GB/S Serial I/O Transceivers

Total I/O bandwidth demand is growing in high-performance systems due to the emergence of many-core microprocessors and in mobile devices to support the next generation of multi-media features. High-speed serial I/O energy efficiency must improve in order to enable continued scaling of these parallel computing platforms in applications ranging from data centers to smart mobile devices. The first work, a low-power forwarded-clock I/O transceiver architecture is presented that employs a high degree of output/input multiplexing, supply-voltage scaling with data rate, and low-voltage circuit techniques to enable low-power operation. The transmitter utilizes a 4:1 output multiplexing voltage-mode driver along with 4-phase clocking that is efficiently generated from a passive poly-phase filter. The output driver voltage swing is accurately controlled from 100-200 mV_(ppd) using a low-voltage pseudo-differential regulator that employs a partial negative-resistance load for improved low frequency gain. 1:8 input de-multiplexing is performed at the receiver equalizer output with 8 parallel input samplers clocked from an 8-phase injection-locked oscillator that provides more than 1UI de-skew range. Low-power high-speed serial I/O transmitters which include equalization to compensate for channel frequency dependent loss are required to meet the aggressive link energy efficiency targets of future systems. The second work presents a low power serial link transmitter design that utilizes an output stage which combines a voltage-mode driver, which offers low static-power dissipation, and current-mode equalization, which offers low complexity and dynamic-power dissipation. The utilization of current-mode equalization decouples the equalization settings and termination impedance, allowing for a significant reduction in pre-driver complexity relative to segmented voltage-mode drivers. Proper transmitter series termination is set with an impedance control loop which adjusts the on-resistance of the output transistors in the driver voltage-mode portion. Further reductions in dynamic power dissipation are achieved through scaling the serializer and local clock distribution supply with data rate. Finally, it presents that a scalable quarter-rate transmitter employs an analog-controlled impedance-modulated 2-tap voltage-mode equalizer and achieves fast power-state transitioning with a replica-biased regulator and ILO clock generation. Capacitively-driven 2 mm global clock distribution and automatic phase calibration allows for aggressive supply scaling

Design of a 100+ meter 12Gb/s/Lane Copper Cable Link Based on Clock-Forwarding

As data centers are expected to manage the increasing demands in bandwidth, processing power and storage requirements, connectivity issues between blades/racks present a whole new set of challenges in maintaining a stable infrastructure. While data centers may grow to occupy thousands of square feet, current passive copper interconnects pose a real limitation with a run length of 10 meters at 10Gbps per wire pair. Optical fiber can extend the interconnection length from 10 meters to 100 meters, but the large power requirements and expensive opto-electric modules prove to be too uneconomical for practical application. As a compromise, through the use of the Infiniband standard, a 12Gbps cable link can be achieved that would extend the range of copper interconnects beyond the 100 meter threshold. The proposed link leverages synchronous clock forwarding on one available data channel that improves jitter tracking, while greatly simplifying the design of the receiver and timing recovery circuits. Only a phase de-skewing is required at the receive side to retrieve the clock-data relationship. In the cable link architecture, the 12 Gbps data is repeated in 8 meter sections with clocking forwarding on a dedicated channel. Then the forwarded clock is dropped off every data repeating stage in order to be multiplied to half the data rate and be used to strobe the incoming data. The longer the quality of clock forwarding is maintained, the cleaner the data strobed at each repeater and the longer the cable can be extended. At each repeater, the clock resets the jitter accumulated from the previous repeater, allowing for data transmission with as much jitter as in the strobing clock. Determining a fine balance in forward clock frequency is crucial in defining jitter performance of the cable link. Frequency beyond the cable bandwidth results in large attenuation of clock amplitude creating more noise and jitter accumulation along clock repeater. On the other hand, frequency well below the cable bandwidth will increase jitter accumulation time and will degrade jitter performance inside the clock multiplier. The trade-off between low frequency clock jitter accumulation in the Clock Multiplication Unit (CMU) and the high frequency jitter accumulation along the clock repeaters is one of the defining aspects of optimizing the active copper link.To further reduce the clock jitter accumulation across repeaters, phase interpolation between the input clock and the divided output of the CMU is used to generate the forward clock for the next repeater stage. The addition of the phase interpolator has negligible power/area cost, dramatically reduces jitter accumulation, and adds another degree of flexibility in choosing the forwarded clock to reduce the total accumulated jitter. With the proper choice of forward clock frequency, application of the FIR filtering technique and a high performance CMU, a total run length of 115 meters is achieved at 12Gbps data rate

The Law of Forensics: a proof beyond the shadow of doubt

This book gives an understanding of the application of forensic sciences to the law. It covers the crime scene investigation process, and provides an overview of the various kinds of forensic evidence that may be collected and presented in court. Points out the identification, documentation and collection of physical evidence, including fingerprints, shoe impressions, hair fibers, firearms evidence and questioned documents, It considers biological evidence, including DNA, and tries to analyse the scientific unimpeachablity of DNA, blood spatter and other fluids, forensic anthropology and odontology. Finally, the book engages fire investigation and forensic accounting. It is designed to provide a foundation in the field of criminology who are interested in the use of science and law to solve crime, and considers the impact of television and other media on the field of Forensic Science and the courtroom