RF MEMS reference oscillators platform for wireless communications

A complete platform for RF MEMS reference oscillator is built to replace bulky quartz from mobile devices, thus reducing size and cost. The design targets LTE transceivers. A low phase noise 76.8 MHz reference oscillator is designed using material temperature compensated AlN-on-silicon resonator. The thesis proposes a system combining piezoelectric resonator with low loading CMOS cross coupled series resonance oscillator to reach state-of-the-art LTE phase noise specifications. The designed resonator is a two port fundamental width extensional mode resonator. The resonator characterized by high unloaded quality factor in vacuum is designed with low temperature coefficient of frequency (TCF) using as compensation material which enhances the TCF from - 3000 ppm to 105 ppm across temperature ranges of -40˚C to 85˚C. By using a series resonant CMOS oscillator, phase noise of -123 dBc/Hz at 1 kHz, and -162 dBc/Hz at 1MHz offset is achieved. The oscillator’s integrated RMS jitter is 106 fs (10 kHz–20 MHz), consuming 850 μA, with startup time is 250μs, achieving a Figure-of-merit (FOM) of 216 dB. Electronic frequency compensation is presented to further enhance the frequency stability of the oscillator. Initial frequency offset of 8000 ppm and temperature drift errors are combined and further addressed electronically. A simple digital compensation circuitry generates a compensation word as an input to 21 bit MASH 1 -1-1 sigma delta modulator incorporated in RF LTE fractional N-PLL for frequency compensation. Temperature is sensed using low power BJT band-gap front end circuitry with 12 bit temperature to digital converter characterized by a resolution of 0.075˚C. The smart temperature sensor consumes only 4.6 μA. 700 MHz band LTE signal proved to have the stringent phase noise and frequency resolution specifications among all LTE bands. For this band, the achieved jitter value is 1.29 ps and the output frequency stability is 0.5 ppm over temperature ranges from -40˚C to 85˚C. The system is built on 32nm CMOS technology using 1.8V IO device

Power Management ICs for Internet of Things, Energy Harvesting and Biomedical Devices

This dissertation focuses on the power management unit (PMU) and integrated circuits (ICs) for the internet of things (IoT), energy harvesting and biomedical devices. Three monolithic power harvesting methods are studied for different challenges of smart nodes of IoT networks. Firstly, we propose that an impedance tuning approach is implemented with a capacitor value modulation to eliminate the quiescent power consumption. Secondly, we develop a hill-climbing MPPT mechanism that reuses and processes the information of the hysteresis controller in the time-domain and is free of power hungry analog circuits. Furthermore, the typical power-performance tradeoff of the hysteresis controller is solved by a self-triggered one-shot mechanism. Thus, the output regulation achieves high-performance and yet low-power operations as low as 12 µW. Thirdly, we introduce a reconfigurable charge pump to provide the hybrid conversion ratios (CRs) as 1⅓× up to 8× for minimizing the charge redistribution loss. The reconfigurable feature also dynamically tunes to maximum power point tracking (MPPT) with the frequency modulation, resulting in a two-dimensional MPPT. Therefore, the voltage conversion efficiency (VCE) and the power conversion efficiency (PCE) are enhanced and flattened across a wide harvesting range as 0.45 to 3 V. In a conclusion, we successfully develop an energy harvesting method for the IoT smart nodes with lower cost, smaller size, higher conversion efficiency, and better applicability. For the biomedical devices, this dissertation presents a novel cost-effective automatic resonance tracking method with maximum power transfer (MPT) for piezoelectric transducers (PT). The proposed tracking method is based on a band-pass filter (BPF) oscillator, exploiting the PT’s intrinsic resonance point through a sensing bridge. It guarantees automatic resonance tracking and maximum electrical power converted into mechanical motion regardless of process variations and environmental interferences. Thus, the proposed BPF oscillator-based scheme was designed for an ultrasonic vessel sealing and dissecting (UVSD) system. The sealing and dissecting functions were verified experimentally in chicken tissue and glycerin. Furthermore, a combined sensing scheme circuit allows multiple surgical tissue debulking, vessel sealer and dissector (VSD) technologies to operate from the same sensing scheme board. Its advantage is that a single driver controller could be used for both systems simplifying the complexity and design cost. In a conclusion, we successfully develop an ultrasonic scalpel to replace the other electrosurgical counterparts and the conventional scalpels with lower cost and better functionality

Efficient power conversion interface circuits for energy harvesting applications

Harvesting energy from the environment for powering micro-power devices have been increasing in popularity. These types of devices can be used in embedded applications or in sensor networks where battery replacement is impractical. In this dissertation, different methods of energy harvesting from the environment are explored as alternative sources of energy for devices. Some of the most popular energy extraction used in electronic devices today are radio frequency (RF) and thermal/vibrational energy extraction. This dissertation presents novel power techniques that enable some of the most efficient power conversion circuits published to date. New power conversion circuits to interface to a piezoelectric micro-power generator that produces electrical energy from temperature differences have been fabricated and tested. Circuit designs and measurement results are presented for a half-wave synchronous rectifier with voltage doubler, a full-wave synchronous rectifier and a passive full-wave rectifier circuit. The active rectifier based on synchronous rectification, fabricated in a 0.25-μm CMOS process, is 86% efficient with 22-μW peak output power when connected to the piezoelectric micro-power generator. This gives the highest efficiency to date for active rectification circuits at the micro-power level. The passive rectifier circuit is 66% efficient with 16-μW peak output power and requires no quiescent current to operate. RF-powered devices are typically inductively coupled and extract their energy from the near field while operating within a few inches of the radiating source. Longer operating distances, exceeding 10 meters, are desired for a broader set of applications including distributed sensor networks. This dissertation describes an efficient method for far field power extraction from RF energy to enable long distance passively powered sensor networks. Passive rectifier circuits are designed in the TSMC 0.25μm mixed-signal CMOS process and antennas for the system are printed on a 4-layer FR4 board. A high-Q resonator is used with a matching network to passively amplify the input voltage to the rectifier. At the circuit level, floating gate transistors are used as rectifying diodes to reduce the diode threshold loss in voltage rectification and therefore increase the rectifier efficiency. A 36-stage rectifier fabricated in a 0.25-μm CMOS process attains an efficiency of over 60% in the far field with a received power sensitivity of 5.5μW(-22.6 dBm), corresponding to an operating distance of 44 meters. The effective threshold voltage of the floating-gate diode is reduced to 36 mV. This is the highest performance for far-field RF energy conversion reported to date. In ultra-low energy system, such as sensor networks, it is essential that power management circuitry are designed to dissipate very low quiescent power. RF energy and power management circuits are designed in a 0.18μm CMOS process. Voltage regulators are designed to operate at high input voltage and low power in a standard CMOS process. The voltage regulators can withstand input voltages up to 12 volts and dissipates from 90 nW to 1.4 μW of power. A floating-gate programming circuit is designed with a self-wakeup timer that turns itself on about once a month. The floating-gate programming circuits dissipates about 30 nW in sleep mode and 8 μW in active mode

An Optical Grooming Switch for High-Speed Traffic Aggregation in Time, Space and Wavelength

In this book a novel optical switch is designed, developed, and tested. The switch integrates optical switching, transparent traffic aggregation/grooming, and optical regener-ation. Innovative switch subsystems are developed that enable these functionalities, including all-optical OTDM-to-WDM converters. High capacity ring interconnection between metro-core rings, carrying 130 Gbit/s OTDM traffic, and metro-access rings carring 43 Gbit/s WDM traffic is experimentally demonstrated. The developed switch features flexibility in bandwidth provisioning, scalability to higher traffic volumes, and backward compatibility with existing network implementations in a future-proof way

Design/cost tradeoff studies. Appendix A. Supporting analyses and tradeoffs, book 1. Earth Observatory Satellite system definition study (EOS)

A listing of the Earth Observatory Satellite (EOS) candidate missions is presented for use as a baseline in describing the EOS payloads. The missions are identified in terms of first, second, and third generation payloads. The specific applications of the EOS satellites are defined. The subjects considered are: (1) orbit analysis, (2) space shuttle interfaces, (3) thematic mapping subsystem, (4) high resolution pointable imager subsystem, (5) the data collection system, (6) the synthetic aperture radar, (7) the passive multichannel microwave radiometer, and (8) the wideband communications and handling equipment. Illustrations of the satellite and launch vehicle configurations are provided. Block diagrams of the electronic circuits are included

An all-digital transmitter for pulsed ultra-wideband communication

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.Includes bibliographical references (p. 91-96).Applications like sensor networks, medical monitoring, and asset tracking have led to a demand for energy-efficient and low-cost wireless transceivers. These types of applications typically require low effective data rates, thus providing an opportunity to employ simple modulation schemes and aggressive duty-cycling. Due to their inherently duty-cycled nature, pulse-based Ultra-Wideband (UWB) systems are amenable to low-power operation by shutting off circuitry during idle mode between pulses. Furthermore, the use of non-coherent UWB signaling greatly simplifies both transmitter and receiver implementations, offering additional energy savings. This thesis presents an all-digital transmitter designed for a non-coherent pulsed UWB system. By exploiting relaxed center frequency tolerances in non-coherent wideband communication, the transmitter synthesizes UWB pulses from an energy efficient, single-ended digital ring oscillator. Dual capacitively-coupled digital power amplifiers (PAs) are used in tandem to generate bipolar phase modulated pulses for spectral scrambling purposes. By maintaining opposite common modes at the output of these PAs during idle mode (i.e. when no pulses are being transmitted), low frequency turn-on and turn-off transients typically associated with single-ended digital circuits driving single-ended antennas are attenuated by up to 12dB. Furthermore, four level digital pulse shaping is employed to attenuate RF side lobes by up to 20dB. The resulting dual power amplifiers achieve FCC compliant operation in the 3.5, 4.0, and 4.5GHz IEEE 802.15.4a bands without the use of any off-chip filters or large passive components. The transmitter is fabricated in a 90nm CMOS process and requires a core area of 0.07mm2. The entirely digital architecture consumes zero static bias current, resulting in an energy efficiency of 17.5pJ/pulse at data rates up to 15.6Mbps.by Patrick Philip Mercier.S.M

High performance RF and baseband building blocks for wireless receivers

Because of the unique architecture of wireless receivers, a designer must understand both the high frequency aspects as well as the low-frequency analog considerations for different building blocks of the receiver. The primary goal of this research work is to explore techniques for implementing high performance RF and baseband building blocks for wireless applications. Several novel techniques to improve the performance of analog building blocks are presented. An enhanced technique to couple two LC resonators is presented which does not degrade the loaded quality factor of the resonators which results in an increased dynamic range. A novel technique to automatically tune the quality factor of LC resonators is presented. The proposed scheme is stable and fast and allows programming both the quality factor and amplitude response of the LC filter. To keep the oscillation amplitude of LC VCOs constant and thus achieving a minimum phase noise and a reliable startup, a stable amplitude control loop is presented. The proposed scheme has been also used in a master-slave quality factor tuning of LC filters. An efficient and low-cost architecture for a 3.1GHz-10.6GHz ultra-wide band frequency synthesizer is presented. The proposed scheme is capable of generating 14A novel pseudo-differential transconductance amplifier is presented. The proposed scheme takes advantage of the second-order harmonic available at the output current of pseudo-differential structure to cancel the third-order harmonic distortion. A novel nonlinear function is proposed which inherently removes the third and the fifth order harmonics at its output signal. The proposed nonlinear block is used in a bandpass-based oscillator to generate a highly linear sinusoidal output. Finally, a linearized BiCMOS transconductance amplifier is presented. This transconductance is used to build a third-order linear phase low pass filter with a cut-off frequency of 264MHz for an ultra-wide band receiver. carrier frequencies

Transceiver architectures and sub-mW fast frequency-hopping synthesizers for ultra-low power WSNs

Wireless sensor networks (WSN) have the potential to become the third wireless revolution after wireless voice networks in the 80s and wireless data networks in the late 90s. This revolution will finally connect together the physical world of the human and the virtual world of the electronic devices. Though in the recent years large progress in power consumption reduction has been made in the wireless arena in order to increase the battery life, this is still not enough to achieve a wide adoption of this technology. Indeed, while nowadays consumers are used to charge batteries in laptops, mobile phones and other high-tech products, this operation becomes infeasible when scaled up to large industrial, enterprise or home networks composed of thousands of wireless nodes. Wireless sensor networks come as a new way to connect electronic equipments reducing, in this way, the costs associated with the installation and maintenance of large wired networks. To accomplish this task, it is necessary to reduce the energy consumption of the wireless node to a point where energy harvesting becomes feasible and the node energy autonomy exceeds the life time of the wireless node itself. This thesis focuses on the radio design, which is the backbone of any wireless node. A common approach to radio design for WSNs is to start from a very simple radio (like an RFID) adding more functionalities up to the point in which the power budget is reached. In this way, the robustness of the wireless link is traded off for power reducing the range of applications that can draw benefit form a WSN. In this thesis, we propose a novel approach to the radio design for WSNs. We started from a proven architecture like Bluetooth, and progressively we removed all the functionalities that are not required for WSNs. The robustness of the wireless link is guaranteed by using a fast frequency hopping spread spectrum technique while the power budget is achieved by optimizing the radio architecture and the frequency hopping synthesizer Two different radio architectures and a novel fast frequency hopping synthesizer are proposed that cover the large space of applications for WSNs. The two architectures make use of the peculiarities of each scenario and, together with a novel fast frequency hopping synthesizer, proved that spread spectrum techniques can be used also in severely power constrained scenarios like WSNs. This solution opens a new window toward a radio design, which ultimately trades off flexibility, rather than robustness, for power consumption. In this way, we broadened the range of applications for WSNs to areas in which security and reliability of the communication link are mandatory

Low Power Circuits for Miniature Sensor Systems.

With the development of VLSI technologies, the sensor systems of all kinds of applications have entered our everyday's life. For specific applications such as medical implants, the form factor of such systems is the crucial concern. In order to minimize of size of the power sources with a given lifetime, the ability to operate the system with low power consumption is the key. An effective way of lowering the active power dissipation is through aggressive voltage scaling. For minimal energy operation, the optimum supply voltage is typical lower than the subthreshold voltage. On the other hand, a sensor system spends most of the time idling while only actively obtaining data in a short period of time. As a result, strong power gating is needed for reducing the leakage power. We discuss the design challenges for several building blocks for the sensor system that have not been gotten much emphasis in term of power consumption. To monitor the period for idle time and to wake up the system periodically, two types of ultra low power timers are proposed. The first one utilizes the gate leakage of a MOS transistor to achieve low temperature dependency and large time constant. The second one implements a program-and-hold technique to compensate for the temperature coefficient of a one-shot oscillator with 150pW of average power. We propose a low power temperature sensor that is suitable for passive RFID transponder. To retrieve the data out of the sensor chip, two passive proximity communication schemes are presented. Capacitive coupling can be used for chips on a stack where the key challenge is misalignment. A alignment detection and microplate reconfiguration method is proposed to solve the problem. We also propose a passive inductive coupling scheme using pulse signaling. Compared to the traditional backscattering technique, the limitations on the quality factor of the inductor and the signal sensitivity of the receiver can be relaxed.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/61782/1/yushiang_1.pd

Contribution to the development of pico-satellites for Earth observation and technology demonstrators

The submitted Ph.D. thesis is a contribution to the development of pico-satellites and nano-satellites for Earth Observation and Technology Demonstrators. Development of satellites with a mass from 1 kg up to 10 kg has really boosted during the past 15 years offering large costs reduction with respect to conventional (larger) satellites at compromised performances. However, these performances are increasing step by step, and their potential is about to explode. With 1.3 kg and a volume of 1 liter, 3Cat-1 is the first pico-satellite class satellite with up to seven different payloads on board: a harvesting energy powered beacon, a new topology solar cells, an optical sensor, a Geiger counter, a mono-atomic MEMS oxygen detector, a graphene transistor, and a Wireless Power Transfer experiment. Additionally, many main subsystems like the Electrical Power, the Attitude Determination and Control, and the Communication subsystems have been developed during this PhD. A description of each subsystem and how they have been integrated under these constrains are described in this PhD Thesis report. In the subsystems and in the experiments there are novel concepts and designs that will be explained. Some have been already published in the technical and scientific literature, others will be in the near future.Tesi doctoral és una contribució al desenvolupament de pico-satèl.lits per a observació de la Terra i demostradors tecnològics. El desenvolupament de satèl¿lits amb massa d'entre 1 kg i 10 kg ha crescut ràpidament durant els darrers 15 anys, oferint importants reduccions de cost respecte els satèl.lits més convencionals (i més grans) amb unes prestacions menors però al mateix temps, acceptables. No obstant, aquestes prestacions estan millorant pas a pas, i el seu potencial a prop d'explosionar. Amb una massa de 1.3 kg i un volum d'un litre, el 3Cat-1 és el primer pico-satèl.lit de la seva categoria equipat amb set diferents càrregues útils a bord: un senyal de radio-balisa alimentat amb energia provinent d'un sistema recol.lector d'energia ambient, una nova topologia de cel.les solars, un sensor òptic, un comptador Geiger, un detector MEMS d'oxigen atòmic, un transistor de grafè, i un experiment de transmissió d'energia per acoblament inductiu. A més a més, molts dels subsistemes com ara el d'energia elèctrica, control i determinació d'actitud, i el subsistema de comunicacions han estat desenvolupats durant aquesta Tesi doctoral. Una descripció de cada subsistema, i com han estat integrats en condicions d'espai, massa i energia reduïdes, s'explica en aquest document. En els subsistemes i en els experiments hi ha nous conceptes i dissenys explicats. Alguns han estat ja publicats en la literatura científica mentre que altres ho seran en un futur prope