431 research outputs found

    A Low Power FinFET Charge Pump For Energy Harvesting Applications

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    Indiana University-Purdue University Indianapolis (IUPUI)With the growing popularity and use of devices under the great umbrella that is the Internet of Things (IoT), the need for devices that are smaller, faster, cheaper and require less power is at an all time high with no intentions of slowing down. This is why many current research efforts are very focused on energy harvesting. Energy harvesting is the process of storing energy from external and ambient sources and delivering a small amount of power to low power IoT devices such as wireless sensors or wearable electronics. A charge pumps is a circuit used to convert a power supply to a higher or lower voltage depending on the specific application. Charge pumps are generally seen in memory design as a verity of power supplies are required for the newer memory technologies. Charge pumps can be also be designed for low voltage operation and can convert a smaller energy harvesting voltage level output to one that may be needed for the IoT device to operate. In this work, an integrated FinFET (Field Effect Transistor) charge pump for low power energy harvesting applications is proposed. The design and analysis of this system was conducted using Cadence Virtuoso Schematic L-Editing, Analog Design Environment and Spectre Circuit Simulator tools using the 7nm FinFETs from the ASAP7 7nm PDK. The research conducted here takes advantage of some inherent characteristics that are present in FinFET technologies, including low body effects, and faster switching speeds, lower threshold voltage and lower power consumption. The lower threshold voltage of the FinFET is key to get great performance at lower supply voltages. The charge pump in this work is designed to pump a 150mV power supply, generated from an energy harvester, to a regulated 650mV, while supplying 1uA of load current, with a 20mV voltage ripple in steady state (SS) operation. At these conditions, the systems power consumption is 4.85uW and is 31.76% efficient. Under no loading conditions, the charge pump reaches SS operation in 50us, giving it the fastest rise time of the compared state of the art efforts mentioned in this work. The minimum power supply voltage for the system to function is 93mV where it gives a regulated output voltage of $25mV. FinFET technology continues to be a very popular design choice and even though it has been in production since Intel's Ivy-Bridge processor in 2012, it seems that very few efforts have been made to use the advantages of FinFETs for charge pump design. This work shows though simulation that FinFET charge pumps can match the performance of charge pumps implemented in other technologies and should be considered for low power designs such as energy harvesting

    Integrated Circuits for Programming Flash Memories in Portable Applications

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    Smart devices such as smart grids, smart home devices, etc. are infrastructure systems that connect the world around us more than before. These devices can communicate with each other and help us manage our environment. This concept is called the Internet of Things (IoT). Not many smart nodes exist that are both low-power and programmable. Floating-gate (FG) transistors could be used to create adaptive sensor nodes by providing programmable bias currents. FG transistors are mostly used in digital applications like Flash memories. However, FG transistors can be used in analog applications, too. Unfortunately, due to the expensive infrastructure required for programming these transistors, they have not been economical to be used in portable applications. In this work, we present low-power approaches to programming FG transistors which make them a good candidate to be employed in future wireless sensor nodes and portable systems. First, we focus on the design of low-power circuits which can be used in programming the FG transistors such as high-voltage charge pumps, low-drop-out regulators, and voltage reference cells. Then, to achieve the goal of reducing the power consumption in programmable sensor nodes and reducing the programming infrastructure, we present a method to program FG transistors using negative voltages. We also present charge-pump structures to generate the necessary negative voltages for programming in this new configuration

    ANALYSIS AND SIMULATION OF PHOTOVOLTAIC SYSTEMS INCORPORATING BATTERY ENERGY STORAGE

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    Solar energy is an abundant renewable source, which is expected to play an increasing role in the grid\u27s future infrastructure for distributed generation. The research described in the thesis focuses on the analysis of integrating multi-megawatt photovoltaics (PV) systems with battery energy storage into the existing grid and on the theory supporting the electrical operation of components and systems. The PV system is divided into several sections, each having its own DC-DC converter for maximum power point tracking and a two-level grid connected inverter with different control strategies. The functions of the battery are explored by connecting it to the system in order to prevent possible voltage fluctuations and as a buffer storage in order to eliminate the power mismatch between PV array generation and load demand. Computer models of the system are developed and implemented using the PSCADTM/EMTDCTM software

    High-Voltage Programmable Delta-Sigma Modulation Voltage-Control Circuit

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    Modern memory semiconductors require different internal voltages to accomplish the myriad of tasks that are required for operation. These internal voltages are multiples of the external voltage that is applied to the part. This multiple can be greater than one, as is the case with voltage pumps, less than one, as in the case of regulated supplies, and negative, as in the case of negative charge pumps. All of these potentials require control and regulation to ensure proper operation of the die. The control of the supply ensures that the required potentials are available when the die needs it. The regulation portion of the equation ensures that the desired potential is sufficient to meet the circuit needs and can react to changes in the circuit using the potential. This research explores the use of a Delta-Sigma Modulation-based circuit to control and regulate the operation of a voltage-generation circuit as well as introduce the ability to dynamically program the output voltage. What is presented in this thesis is the use of Delta-Sigma Modulation to sense, generate, and control the pumped wordline potentials necessary in a modern NAND memory device. These voltages generally consist of a read, erase, pass, and program potentials. The topology was chosen for voltage stability, superior response time when measured at the highest potential, and the ability to program the desired output potential depending on the circuit operation being performed. The proposed circuit was designed and fabricated using AMI’s 500 nm process through the MOSIS service (www.mosis.com). The chip performance has been evaluated and compared to the simulation results to verify accurate voltage generation over a wide input voltage and output response to changes in the input voltage. The control voltage was varied from 0.6 volts to 2.0 volts and the output voltages were measured to be 5.76 volts and 20.03 volts, respectively. The linearity of the output response was measured to average within 100 millivolts of the ideal. The response time of the DSM was also measured with good correlation to the simulation values

    Control circuits for avalanche photodiodes

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    Avalanche Photodiodes (APDs) have been used in a wide range of low light sensing applications such as DNA sequencing, quantum key distribution, LIDAR and medical imaging. To operate the APDs, control circuits are required to achieve the desired performance characteristics. This thesis presents the work on development of three control circuits including a bias circuit, an active quench and reset circuit and a gain control circuit all of which are used for control and performance enhancement of the APDs. The bias circuit designed is used to bias planar APDs for operation in both linear and Geiger modes. The circuit is based on a dual charge pumps configuration and operates from a 5 V supply. It is capable of providing milliamp load currents for shallow-junction planar APDs that operate up to 40 V. With novel voltage regulators, the bias voltage provided by the circuit can be accurately controlled and easily adjusted by the end user. The circuit is highly integrable and provides an attractive solution for applications requiring a compact integrated APD device. The active quench and reset circuit is designed for APDs that operate in Geiger-mode and are required for photon counting. The circuit enables linear changes in the hold-off time of the Geiger-mode APD (GM-APD) from several nanoseconds to microseconds with a stable setting step of 6.5 ns. This facilitates setting the optimal `afterpulse-free' hold-off time for any GM-APD via user-controlled digital inputs. In addition this circuit doesn’t require an additional monostable or pulse generator to reset the detector, thus simplifying the circuit. Compared to existing solutions, this circuit provides more accurate and simpler control of the hold-off time while maintaining a comparable maximum count-rate of 35.2 Mcounts/s. The third circuit designed is a gain control circuit. This circuit is based on the idea of using two matched APDs to set and stabilize the gain. The circuit can provide high bias voltage for operating the planar APD, precisely set the APD’s gain (with the errors of less than 3%) and compensate for the changes in the temperature to maintain a more stable gain. The circuit operates without the need for external temperature sensing and control electronics thus lowering the system cost and complexity. It also provides a simpler and more compact solution compared to previous designs. The three circuits designed in this project were developed independently of each other and are used for improving different performance characteristics of the APD. Further research on the combination of the three circuits will produce a more compact APD-based solution for a wide range of applications
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