6 research outputs found
Design and implementation of frequency synthesizers for 3-10 ghz mulitband ofdm uwb communication
The allocation of frequency spectrum by the FCC for Ultra Wideband (UWB)
communications in the 3.1-10.6 GHz has paved the path for very high data rate Gb/s
wireless communications. Frequency synthesis in these communication systems involves
great challenges such as high frequency and wideband operation in addition to stringent
requirements on frequency hopping time and coexistence with other wireless standards.
This research proposes frequency generation schemes for such radio systems and their
integrated implementations in silicon based technologies. Special emphasis is placed on
efficient frequency planning and other system level considerations for building compact
and practical systems for carrier frequency generation in an integrated UWB radio.
This work proposes a frequency band plan for multiband OFDM based UWB
radios in the 3.1-10.6 GHz range. Based on this frequency plan, two 11-band frequency
synthesizers are designed, implemented and tested making them one of the first
frequency synthesizers for UWB covering 78% of the licensed spectrum. The circuits are
implemented in 0.25µm SiGe BiCMOS and the architectures are based on a single VCO at a fixed frequency followed by an array of dividers, multiplexers and single sideband
(SSB) mixers to generate the 11 required bands in quadrature with fast hopping in much
less than 9.5 ns. One of the synthesizers is integrated and tested as part of a 3-10 GHz
packaged receiver. It draws 80 mA current from a 2.5 V supply and occupies an area of
2.25 mm2.
Finally, an architecture for a UWB synthesizer is proposed that is based on a
single multiband quadrature VCO, a programmable integer divider with 50% duty cycle
and a single sideband mixer. A frequency band plan is proposed that greatly relaxes the
tuning range requirement of the multiband VCO and leads to a very digitally intensive
architecture for wideband frequency synthesis suitable for implementation in deep
submicron CMOS processes. A design in 130nm CMOS occupies less than 1 mm2 while
consuming 90 mW. This architecture provides an efficient solution in terms of area and
power consumption with very low complexity
Design and implementation of frequency synthesizers for 3-10 ghz mulitband ofdm uwb communication
The allocation of frequency spectrum by the FCC for Ultra Wideband (UWB)
communications in the 3.1-10.6 GHz has paved the path for very high data rate Gb/s
wireless communications. Frequency synthesis in these communication systems involves
great challenges such as high frequency and wideband operation in addition to stringent
requirements on frequency hopping time and coexistence with other wireless standards.
This research proposes frequency generation schemes for such radio systems and their
integrated implementations in silicon based technologies. Special emphasis is placed on
efficient frequency planning and other system level considerations for building compact
and practical systems for carrier frequency generation in an integrated UWB radio.
This work proposes a frequency band plan for multiband OFDM based UWB
radios in the 3.1-10.6 GHz range. Based on this frequency plan, two 11-band frequency
synthesizers are designed, implemented and tested making them one of the first
frequency synthesizers for UWB covering 78% of the licensed spectrum. The circuits are
implemented in 0.25µm SiGe BiCMOS and the architectures are based on a single VCO at a fixed frequency followed by an array of dividers, multiplexers and single sideband
(SSB) mixers to generate the 11 required bands in quadrature with fast hopping in much
less than 9.5 ns. One of the synthesizers is integrated and tested as part of a 3-10 GHz
packaged receiver. It draws 80 mA current from a 2.5 V supply and occupies an area of
2.25 mm2.
Finally, an architecture for a UWB synthesizer is proposed that is based on a
single multiband quadrature VCO, a programmable integer divider with 50% duty cycle
and a single sideband mixer. A frequency band plan is proposed that greatly relaxes the
tuning range requirement of the multiband VCO and leads to a very digitally intensive
architecture for wideband frequency synthesis suitable for implementation in deep
submicron CMOS processes. A design in 130nm CMOS occupies less than 1 mm2 while
consuming 90 mW. This architecture provides an efficient solution in terms of area and
power consumption with very low complexity
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Ultra-Wideband Relay Communication Systems
Impulse-radio ultra-wide-band (IR-UWB) signaling is a promising technique
for high-speed, short-range relay communications networks. Depending on how
the relay node retransmits the signal, there are two main relay schemes: conventional
one-directional (one-way) relay model, and bi-directional (two-way) relay
model. In bi-directional relay communications, wireless network coding (WNC),
also called physical-layer network coding (PNC), could be applied to overcome
the spectral efficiency limitation of the conventional one-way relay.
In the first part of this work, we propose asynchronous, differential, and
bidirectional decode and forward (ADBDF) and asynchronous, differential, and
bidirectional denoise and forward (ADBDNF) UWB relay methods, where the
relay node (RN) does not need to be synchronized with the end nodes (ENs). The
proposed schemes are attractive for networks in which stringent/complicated
synchronization between the RN and the ENs may not be feasible.
The second part of this work focuses on UWB channel classification. We propose
a 2-dimensional (2-D) LOS/NLOS classification scheme that uses skewness of the channel impulse/pulse response. The proposed channel classification decreases
the complexity of existing channel classification methods and can be used
in a variety of areas such as localization, relay communications, and cooperative
communications.
The final part of this work deals with compressive sensing (CS) algorithms
that employ sub-Nyquist sampling for UWB communications. We develop coarse
graining (CG) for the proposed CS sub-Nyquist sampling technique, which leads
to: (1) reduced sampling rate at the receiver, and hence reduced use of analog-to-digital
converters (ADCs) resources; and (2) low-complexity channel estimation
Continuous-time low-pass filters for integrated wideband radio receivers
This thesis concentrates on the design and implementation of analog baseband continuous-time low-pass filters for integrated wideband radio receivers. A total of five experimental analog baseband low-pass filter circuits were designed and implemented as a part of five single-chip radio receivers in this work.
After the motivation for the research work presented in this thesis has been introduced, an overview of analog baseband filters in radio receivers is given first. In addition, a review of the three receiver architectures and the three wireless applications that are adopted in the experimental work of this thesis is presented. The relationship between the integrator non-idealities and integrator Q-factor, as well as the effect of the integrator Q-factor on the filter frequency response, are thoroughly studied on the basis of a literature review. The theoretical study that is provided is essential for the gm-C filter synthesis with non-ideal lossy integrators that is presented after the introduction of different techniques to realize integrator-based continuous-time low-pass filters. The filter design approach proposed for gm-C filters is original work and one of the main points in this thesis, in addition to the experimental IC implementations.
Two evolution versions of fourth-order 10-MHz opamp-RC low-pass filters designed and implemented for two multicarrier WCDMA base-station receivers in a 0.25-µm SiGe BiCMOS technology are presented, along with the experimental results of both the low-pass filters and the corresponding radio receivers. The circuit techniques that were used in the three gm-C filter implementations of this work are described and a common-mode induced even-order distortion in a pseudo-differential filter is analyzed. Two evolution versions of fifth-order 240-MHz gm-C low-pass filters that were designed and implemented for two single-chip WiMedia UWB direct-conversion receivers in a standard 0.13-µm and 65-nm CMOS technology, respectively, are presented, along with the experimental results of both the low-pass filters and the second receiver version. The second UWB filter design was also embedded with an ADC into the baseband of a 60-GHz 65-nm CMOS radio receiver. In addition, a third-order 1-GHz gm-C low-pass filter was designed, rather as a test structure, for the same receiver. The experimental results of the receiver and the third gm-C filter implementation are presented