223 research outputs found

    Four-element phased-array beamformers and a self-interference canceling full-duplex transciver in 130-nm SiGe for 5G applications at 26 GHz

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    This thesis is on the design of radio-frequency (RF) integrated front-end circuits for next generation 5G communication systems. The demand for higher data rates and lower latency in 5G networks can only be met using several new technologies including, but not limited to, mm-waves, massive-MIMO, and full-duplex. Use of mm-waves provides more bandwidth that is necessary for high data rates at the cost of increased attenuation in air. Massive-MIMO arrays are required to compensate for this increased path loss by providing beam steering and array gain. Furthermore, full duplex operation is desirable for improved spectrum efficiency and reduced latency. The difficulty of full duplex operation is the self-interference (SI) between transmit (TX) and receive (RX) paths. Conventional methods to suppress this interference utilize either bulky circulators, isolators, couplers or two separate antennas. These methods are not suitable for fully-integrated full-duplex massive-MIMO arrays. This thesis presents circuit and system level solutions to the issues summarized above, in the form of SiGe integrated circuits for 5G applications at 26 GHz. First, a full-duplex RF front-end architecture is proposed that is scalable to massive-MIMO arrays. It is based on blind, RF self-interference cancellation that is applicable to single/shared antenna front-ends. A high resolution RF vector modulator is developed, which is the key building block that empowers the full-duplex frontend architecture by achieving better than state-of-the-art 10-b monotonic phase control. This vector modulator is combined with linear-in-dB variable gain amplifiers and attenuators to realize a precision self-interference cancellation circuitry. Further, adaptive control of this SI canceler is made possible by including an on-chip low-power IQ downconverter. It correlates copies of transmitted and received signals and provides baseband/dc outputs that can be used to adaptively control the SI canceler. The solution comes at the cost of minimal additional circuitry, yet significantly eases linearity requirements of critical receiver blocks at RF/IF such as mixers and ADCs. Second, to complement the proposed full-duplex front-end architecture and to provide a more complete solution, high-performance beamformer ICs with 5-/6- b phase and 3-/4-b amplitude control capabilities are designed. Single-channel, separate transmitter and receiver beamformers are implemented targeting massive- MIMO mode of operation, and their four-channel versions are developed for phasedarray communication systems. Better than state-of-the-art noise performance is obtained in the RX beamformer channel, with a full-channel noise figure of 3.3 d

    Passive combining network for THz phased arrays

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    Abstract. Power combiners play an important role in the phased array transceivers at mmWave and THz frequencies. Wilkinson combiner has been in use for a long time and is considered one of the best power combiners due to its good port isolation and low losses. In this work theoretical and simulation studies have been done to design the power combiner for sub-THz receiver front-end in the IHP 130nm SiGe process. The Wilkinson combiner designed in this work is able to provide decent performance around 300GHz frequency and shows good isolation between the input ports. The differential Wilkinson combiner has input combining port isolation of -18.2dB and reflection coefficients are around -8.5±0.5dB. While from the transmission coefficients the path loss observed is around 3.7dB. Besides this the differential Wilkinson combiner has also provided decent performance with the phase shifter testbench

    Vidutinių dažnių 5G belaidžių tinklų galios stiprintuvų tyrimas

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    This dissertation addresses the problems of ensuring efficient radio fre-quency transmission for 5G wireless networks. Taking into account, that the next generation 5G wireless network structure will be heterogeneous, the device density and their mobility will increase and massive MIMO connectivity capability will be widespread, the main investigated problem is formulated – increasing the efficiency of portable mid-band 5G wireless network CMOS power amplifier with impedance matching networks. The dissertation consists of four parts including the introduction, 3 chapters, conclusions, references and 3 annexes. The investigated problem, importance and purpose of the thesis, the ob-ject of the research methodology, as well as the scientific novelty are de-fined in the introduction. Practical significance of the obtained results, defended state-ments and the structure of the dissertation are also included. The first chapter presents an extensive literature analysis. Latest ad-vances in the structure of the modern wireless network and the importance of the power amplifier in the radio frequency transmission chain are de-scribed in detail. The latter is followed by different power amplifier archi-tectures, parameters and their improvement techniques. Reported imped-ance matching network design methods are also discussed. Chapter 1 is concluded distinguishing the possible research vectors and defining the problems raised in this dissertation. The second chapter is focused around improving the accuracy of de-signing lumped impedance matching network. The proposed methodology of estimating lumped inductor and capacitor parasitic parameters is dis-cussed in detail provi-ding complete mathematical expressions, including a summary and conclusions. The third chapter presents simulation results for the designed radio fre-quency power amplifiers. Two variations of Doherty power amplifier archi-tectures are presented in the second part, covering the full step-by-step de-sign and simulation process. The latter chapter is concluded by comparing simulation and measurement results for all designed radio frequency power amplifiers. General conclusions are followed by an extensive list of references and a list of 5 publications by the author on the topic of the dissertation. 5 papers, focusing on the subject of the discussed dissertation, have been published: three papers are included in the Clarivate Analytics Web of Sci-ence database with a citation index, one paper is included in Clarivate Ana-lytics Web of Science database Conference Proceedings, and one paper has been published in unreferred international conference preceedings. The au-thor has also made 9 presentations at 9 scientific conferences at a national and international level.Dissertatio

    60 GHz transceiver circuits in SiGe-HBT and CMOS technologies

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    Die Erhöhung der Übertragungsrate von Kommunikationssystemen ist von hohem wissenschaftlichem und wirtschaftlichem Interesse. Die stetige Fortentwicklung dieser Systeme, sowohl unter Aspekten der Hard- als auch der Software, hat ein neues Technologiezeitalter eingeläutet. Verschiedene Szenarien, auf optischen, drahtgebundenen und drahtlosen Technologien basierend, wurden für diese Anwendungen entwickelt. Im 60 GHz ISM-Band (57 GHz bis 65 GHz) ist wegen der hohen Absorptionsverluste bei dieser Frequenz eine Kurzstrecken-Kommunikation mit hoher Datenrate von besonders hohem Interesse. Die Realisierung solcher Systeme erfolgt aufgrund von Kosten- und Massenproduktionsaspekten auf Basis von SiGe-HBT und CMOS Technologien. Schlüsselparameter eines 60 GHz-Transceivers sind eine hohe Ausgangsleistung, niedrige Rauschzahl, geringer Stromverbrauch und niedrige Herstellungskosten. Um den gesamten Frequenzbereich des 60 GHz ISM-Bandes abdecken zu können, wurden zahlreiche Transceivertopologien weltweit diskutiert. Die verfügbare Technologie mit ihren Schlüsselparametern ft, fmax stellt hierbei eine wichtige Randbedingung dar. In dieser Arbeit werden Aspekte des 60 GHz-Transceiver-Designs unter Verwendung einer 0,25 μm SiGe-HBT- und einer 90 nm CMOS-Technologie untersucht. Zunächst wird die Modellierung von passiven und aktiven Komponenten diskutiert. Verschiedene Techniken zur Modellextraktion basierend auf Messungen und elektromagnetischen Simulationen werden gezeigt. Für die wichtigsten passiven Bauelemente werden skalierbare Modelle entwickelt, um das Entwurfsverfahren zu präzisieren. Im nächsten Schritt werden 60 GHz CMOS- und SiGe-HBT- Leistungsverstärker untersucht. Basierend auf diesen Studien wurden zwei HBT und zwei CMOS-Endstufen konzipiert, realisiert und gemessen. Infolge der Verfügbarkeit einer hochgenauen Bauelemente-Bibliothek, ausgereifter Entwurfstechniken und der Verifikation auf Basis von EM-Simulationen konnte an den gemessenen Leistungsverstärkern eine hohe Ausgangsleistung mit guter Effizienz nachgewiesen werden. Die Ergebnisse zeigen weiterhin eine gute Übereinstimmung von Simulationen mit Messungen. Weiterhin wurden auf Basis einer 90 nm CMOS Technologie ein Heterodyne und ein OOK Transceiver entwickelt. Der Heterodyne-Transceiver mit einer Zwischenfrequenz von 20 GHz genügt dabei dem IEEE 802.15.3c Standard und erreicht eine Performance auf Höhe des internationalen Standes von Wissenschaft und Technik. Für den OOK Sender wurde eine neue Topologie entwickelt. Bei diesem Konzept bilden Modulator und Leistungsverstärker eine Einheit, woraus Vorteile hinsichtlich Ausgangsleistung, Effizienz und Chipgröße resultieren. Mit dieser Schaltung wurde in einem Systemtest eine Übertragungsrate von 6 Gbps über eine Entfernung von 4 m erfolgreich nachgewiesen.The rise of high-data-rate hungry applications has brought a new dawn to telecommunication technologies in both hardware and software development aspects. Different scenarios, mainly based on optical, coaxial and wireless systems, have been developed for these multi-gigabit communication systems. In these scenarios, the wireless system is utilized for indoor and short-range communication, which can ease the requirements on RF power and noise figure of the transceivers. However, the demand for multi-gigabit communication imposes a broadband performance requirement upon these wireless transceivers. This broadband performance requirement can be within the range of 2 GHz to 10 GHz. In order to cover such a broad frequency range, different transceiver circuit topologies have been suggested by many circuit designers. Due to the high oxygen loss in the 60 GHz range this 57 GHz to 65 GHz ISM band has attracted attention for high speed short-range communication. Moreover, the newly emerged low cost technologies (like, CMOS and SiGe HBT) have further attracted the industry to explore this communication band. The main requirements for a 60 GHz transceiver are high output power, low noise figure, low power consumption and broadband performance. To cover the whole 57 GHz to 65 GHz frequency band, numerous transceiver topologies are under discussion. The key parameter ft, fmax of the available technology define the achievable system performance. In this thesis, multiple aspects of the 60 GHz transceiver design based on the 90 nm CMOS and 0.25 μm SiGe HBT designs have been investigated. First, the modeling of passive and active components is presented. These components include capacitors, inductors, transformers, transmission lines, transistors, matching networks and RF pads. Different techniques for model extraction based on measurements and electromagnetic simulations have been examined. For inductors, transformers and capacitors scalable models have been developed. Further, the design techniques of 60 GHz CMOS and SiGe HBT power amplifiers have been studied. Based on these studies, two HBT and two CMOS power amplifiers have been designed, realized and measured. Due to accurate modeling and design techniques, high performance and good agreement with simulation has been achieved. Finally, two different types of transmitters (Heterodyne and OOK) based on the CMOS technology have been developed. The heterodyne transceiver, with an IF frequency of around 20 GHz, has been designed based on the IEEE 802.15.3c standard. This transmitter has achieved state of the art results with respect to output power, conversion gain and efficiency with a small chip size and low power consumption. For the OOK transmitter, a novel topology has been developed. In this topology, the modulator and the power amplifier have been integrated into one circuit. Due to many advantages of this new topology, this transmitter achieves higher output power and efficiency compared with state-of-the-art results. Furthermore, the realized circuit has been utilized within a wireless system where more than 6 Gbps has been successfully transmitted over a 4 m distance

    Advanced High Efficiency Architectures for Next Generation Wireless Communications

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    L'abstract è presente nell'allegato / the abstract is in the attachmen

    Radio Frequency and Millimeter Wave Circuit Component Design with SiGe BiCMOS Technology

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    The objective of this research is to study and leverage the unique properties and advantages of silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) integrated circuit technologies to better design radio frequency (RF) and millimeter wave (mm-wave) circuit components. With recent developments, the high yield and modest cost silicon-based semiconductor technologies have proven to be attractive and cost-effective alternatives to high-performance III-V technology platforms. Between SiGe bipolar complementary metal-oxide-semiconductor (BiCMOS) technology and advanced RF complementary metal-oxide-semiconductor (CMOS) technology, the fundamental device-level differences between SiGe HBTs and field-effect transistors (FETs) grant SiGe HBTs clear advantages as well as unique design concerns. The work presented in this dissertation identifies several advantages and challenges on design using SiGe HBTs and provides design examples that exploit and address these unique benefits and problems with circuit component designs using SiGe HBTs.Ph.D

    Multi-Band Outphasing Power Amplifier Design for Mobile and Base Stations

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    New generations of wireless communication systems require linear efficient RF power amplifiers (PAs) for higher transmission data rates and longer battery life. On the contrary, conventional PAs are normally designed for peak efficiency under maximum output power (Pout). Thus, in power back-off, the overall efficiency degrades significantly and the average efficiency is much lower than the efficiency at maximum Pout. Chireix outphasing PA, also called LINC (Linear amplification using Non-linear Components), is one of the most promising techniques to improve the efficiency at power back-off. In this method, a variable envelope input signal is first decomposed into two constant-envelope phase-modulated signals and then amplified using two highly efficient non-linear PAs. The output signals are combined preferably in a loss-less power combiner to build the desired output signal. In this way, the PA exhibits high efficiency with good linearity. In this thesis, first we analyze a complex model of outphasing combiner considering its nonidealities such as reflection and loss in transmission lines (TL). Then we propose a compact model with analytical formula that is validated through several comparative tests using ADS and Spectre RF. Furthermore, we analyze the effect of reactive load in Chireix combiner with stubs (a parallel inductor and capacitor), while distinguishing between its capacitive and inductive parts. It is demonstrated that only the capacitive part of the reactive load degrades the performances. Based on this, a new architecture (Z LINC) is proposed where the power combiner is designed to provide a zero capacitive load to the PAs whatever the outphasing angle. The theory describing the operations of the system is developed and a 900 MHz classical LINC and Z-LINC PAs are designed and measured. In addition, a miniaturization technique is proposed which employs λ/8 or smaller TLs instead of conventional λ/4 TLs in outphasing power combiner. This technique is applied to implement a 900 MHz PA using LDMOS power transistors. Besides single-band PAs, dual-band PAs are more and more needed because of an increasing demand for wireless communication terminals to handle multi-band operation. In chapter 5, a new compact design approach for dual-band transmitters based on a reconfigurable outphasing combiner is proposed. The objective is to avoid the cumbersome implementations where several PAs and matching network are used in parallel. The technique is applied to design a dual band PA with a fully integrated power combiner in 90 nm CMOS technology. An inverter-based class D PA topology, particularly suitable for outphasing and multimode operations is presented. The TLs in the combiner, realized using a network of on-chip series inductors and parallel capacitors, are reconfigurable from λ/4 in 1800 MHz to λ/8 in 900 MHz. In order to maximize the efficiency, the on-chip inductors are implemented using high quality factor on chip slab inductors. The measured maximum Pout at 900/1800 MHz are 24.3 and 22.7 dBm with maximum efficiencies of 51% and 34% respectively

    On the design of high-efficiency RF Doherty power amplifiers

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    Power amplifiers (PAs) are one of the most crucial elements in wireless standards becasue they are the most power hungry subsystems. These elements have to face an important issue, which is the power efficiency, a fact related with the output back-off (OBO). But the OBO depends on the kind of modulated signal, in proportion to the modulated signal peak-to-average power ratio (PAPR). The higuer is the data rate, the higer is the OBO, and consequently the lower is the efficiency. A low efficiency of PAs causes the waste of energy as heat. Furthermore, the trade-off between linearity and efficiency in PAs is another major issue. To cope with the undesired circumstances producing efficiency degradation, the Doherty power amplifier (DPA) is one of the useful techniques which provide high efficiency for high PAPR of modern communication signals. Nevertheless, the limited bandwidth (BW) of this kind of PAs (about 10% of fractional bandwidth) and its importance (in modern wireless systems such as LTE, WiMAX, Wi-Fi and satellite systems) have encouraged the researchers to improve this drawback in recent years. Some typical BW limiting factors effect on the performance of DPAs: i) quarter-wave length transformers, ii) phase compensation networks in/output matching circuits, iii) offset lines and device non-idealities; The quarter-wave length transformers performs as an inverter impedance in the load modulation technique of DPAs. The future objective in designing DPAs is to decrease the impact of these issues. In this context, this PhD-thesis is focused on improving fractional bandwidth of DPAs using the new methods that are related to impedance transformers instead of impedance inverters in the load modulation technique. This study is twofold. First, it is presented a novel DPA where a wideband GaN DPA in the 2.5 GHz band with an asymmetrical Wilkinson splitter. The impedance transformer of the proposed architecture is based on a matching network including a tapered line with multi-section transformer in the main stage. The BW of this DPA has ranged from 1.8 to 2.7 GHz. Plus, the obtained power efficiency (drain) is higher than 33% in the whole BW at both maximum and OBO power levels. Second, based on the benefits of the Klopfenstein taper, a promising DPA design is proposed where a Klopfenstein taper replaces the tapered line. In fact, this substitution results on reducing the reflection coefficient of the transformer. From a practical prototype realization of this novel Doherty-like PA in the 2.25 GHz band, this modification has demonstrated that the resulting DPA BW is increased in comparison to the conventional topology while keeping the efficiency figures. Moreover, this study also shows that the Klopfenstein taper based design allows an easy tuning of the group delay through the output reactance of the taper, resulting in a more straightforward adjustments than other recently published designs where the quarter-wave transformer is replaced by multi-section transmission lines (hybrid or similar). Experimental results have shown 43-54% of drain efficiency at 42 dBm output power, in the range of 1.7 to 2.75 GHz. Concretely, the results presented in this novel Doherty-like PA implies an specific load modulation technique that uses the mixed Klopfenstein tapered line together with a multi-section transformer in order to obtain high bandwidth with the usual efficiency in DPAs.Los amplificadores de potencia (PAs) son uno de los elementos más importantes para los transmisores inalámbricos desde el punto de vista del consumo energético. Un aspecto muy importante es su eficiencia energética, un concepto relacionado con el back-off de salida (OBO), que a su vez viene condicionadpo por el PAPR de la señal modulada a amplificar. Una baja eficiencia de los PA hace que la pérdida de energía se manifieste en forma de calor. De hecho, esta cuestión conduce al incremento de los costes y tamaño, esto último por los radiadores. Además, el compromiso entre la linealidad y la eficiencia en los PA es otro problema importante. Para hacer frente a las circunstancias que producen la degradación de la eficiencia, el amplificador de potencia tipo Doherty (DPA) es una de las técnicas más útiles que proporcionan una buena eficiencia incluso para los altos PAPR comunes en señales de comunicación modernos. Sin embargo, el limitado ancho de banda (BW) de este tipo de PA (alrededor del 10% del ancho de banda fraccional) y su importancia (en los sistemas inalámbricos modernos, tales como LTE, WiMAX, Wi-Fi y sistemas de satélites) han animado a los investigadores para mejorar este inconveniente en los últimos años. Algunos aspectos típicos que limitan el BW en los DPA son: i) transformadores de longitud de cuarto de onda, ii) redes de compensación de fase y circuitos de adaptación de salida, iii) compensación de las líneas y los dispositivos no ideales. Los transformadores de cuarto de onda actuan como un inversor de impedancia en la técnica de modulación de carga de la DPA "("load modulation"). Concretamente, el objetivo futuro de diseño de DPA es disminuir el impacto de estos problemas. En este contexto, esta tesis doctoral se centra en mejorar el ancho de banda fraccional de DPA utilizando los nuevos métodos que están relacionados con el uso de transformadores de impedancias en vez de inversores en el subcircuito de modulación de carga. Este estudio tiene dos niveles. En primer lugar, se presenta una novedosa estructura del DPA de banda ancha usándose dispositivos de GaN en la banda de 2,5 GHz con un divisor Wilkinson asimétrico. El transformador de impedancias de la arquitectura propuesta se basa en una red de adaptación, incluyendo una línea cónica con múltiples secciones del transformador en la etapa principal. El BW de este DPA ha sido de 1,8 a 2,7 GHz. Además, se obtiene una eficiencia de drenador de más del 33% en todo el BW, tanto a nivel de potencia máxima como a nivel del OBO. En segundo lugar, aprovechando los beneficios de un adaptador de Klopfenstein, se propone un nuevo diseño del DPA. Con la sustitución de la lina conica por el Klopfenstein se reduce el coeficiente de reflexión de transformador de impedancias. Sobre un prototipo práctico de esta nueva estructura del Doherty, en la banda de 2,25 GHz, se ha demostrado que el BW resultante se incrementa en comparación con la topología convencional mientras se mantienen las cifras de eficiencia. Por otra parte, en este estudio se demuestra que el diseño basado en el Klopfenstein permite una afinación fácil del retardo de grupo a través de la reactancia de salida del taper, lo que resulta en un ajuste más sencillo que otros diseños publicados recientemente en el que el transformador de cuarto de onda se sustituye por multi-líneas de transmisión de la sección (híbridos o similar). Los resultados experimentales han mostrado un 43-54% de eficiencia de drenador sobre 42 dBm de potencia de salida, en el intervalo de 1,7 a 2,75 GHz. Concretamente, los resultados presentados en esta nueva estructura tipo-Doherty implican una técnica de modulación de carga que utiliza una combinación de un Klopfenstein junto con un transformador de múltiples secciones con el fin de obtener un alto ancho de banda con la eficiencia habitual en DPAs.Els amplificadors de potència (PA) són un dels elements més importants per els sistemes ràdio ja que sone ls principals consumidors d'energía. Un aspecte molt important és l'eficiència de l'amplificador, aspecte relacionat amb el back-off de sortida (OBO) que a la seva vegada ve condicionat pel PAPR del senyal modulat. Una baixa eficiència dels PA fa que la pèrdua d'energia en manifesti en forma de calor. De fet, aquesta qüestió porta a l'increment dels costos i grandària, degut als dissipadors de calor. A més, el compromís entre la linealitat i l'eficiència en els PA es un altre problema important. Per fer front a les circumstàncies que porten a la degradació de l'eficiència, l'amplificador de potència Doherty (DPA) és una de les tècniques més útils i que proporcionen una bona eficiència per als alts PAPR comuns en senyals de comunicació moderns. No obstant això, l'ample de banda limitat (BW) d'aquest tipus de PA (al voltant del 10% de l'ample de banda fraccional) i la seva importància (en els sistemes moderns, com ara LTE, WiMAX, Wi-Fi i sistemes de satèl·lits) han animat els investigadors per millorar aquest inconvenient en els últims anys. Alguns aspectes tipicament limitadors del BW en els DPA son: i) transformadors de longitud d'quart d'ona, ii) xarxes de compensació de fase en circuits / adaptacions de sortida, iii) compensació de les línies i els dispositius no ideals. Els transformadors de quart d'ona s'utilitzen com a inversors d'impedàncies en la tècnica de modulació de càrrega del DPA ("load modulation"). Concretament, l'objectiu futur de disseny d'DPA és disminuir l'impacte d'aquests problemes. En aquest context, aquesta tesi doctoral es centra en millorar l'ample de banda fraccional dels DPA utilitzant nous mètodes que estan relacionats amb l'ús de transformadors d'impedàncies, en comptes d'inversors, en el subcircuit de modulació de càrrega. Aquest treball té dos nivells. En primer lloc, es presenta un DPA novedós que fa servir dispositus GaN DPA a la banda de 2,5 GHz amb un divisor Wilkinson asimètric. El transformador d'impedàncies de l'arquitectura proposada es basa en una xarxa d'adaptació, incloent una línia cònica amb múltiples seccions del transformador en l'etapa principal. El BW d'aquest DPA ha mostrat ser d'1,8 a a 2,7 GHz. A més, s'obté una eficiència de drenador de més del 33% en tot el BW, tant a nivell de potència màxima com de OBO. En segon lloc, sobre la base dels beneficis del adaptador de Klopfenstein, un proposa un nou disseny on un Klopfenstein substitueix la anterior línia cònica. Aquesta substitució repercuteix en la reducció del coeficient de reflexió de transformador d'impedàncies.Des d'una realització pràctica (prototipus) d'aquest nou amplificador tipus Doherty a la banda de 2,25 GHz, s'ha demostrat que el BW resultant s'incrementa en comparació amb la topologia convencional mentre es mantenen les xifres d'eficiència. D'altra banda, en aquest estudi es demostra que el disseny basat en el Klopfenstein permet una afinació fàcil del retard de grup a través de la reactància de sortida de la forma cònica, el que resulta en un ajust més senzill que altres dissenys publicats recentment en què el transformador de quart d'ona es substitueix per multi-línies de transmissió de la secció (híbrids o similar). Els resultats experimentals han mostrat un 43-54% d'eficiència de drenador en 42 dBm de potència de sortida, en l'interval de 1,7-2,75 GHz. Concretament, els resultats presentats en aquest nou amplificador tipus Doherty impliquen una tècnica de modulació de càrrega específic que utilitza una combinació del Klopfenstein juntament amb un transformador de múltiples seccions per tal d'obtenir un alt ample de banda amb la usual eficiència en DPAs.Postprint (published version
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