Design Considerations of a Sub-50 {\mu}W Receiver Front-end for Implantable Devices in MedRadio Band

Emerging health-monitor applications, such as information transmission through multi-channel neural implants, image and video communication from inside the body etc., calls for ultra-low active power (<50${\mu}$W) high data-rate, energy-scalable, highly energy-efficient (pJ/bit) radios. Previous literature has strongly focused on low average power duty-cycled radios or low power but low-date radios. In this paper, we investigate power performance trade-off of each front-end component in a conventional radio including active matching, down-conversion and RF/IF amplification and prioritize them based on highest performance/energy metric. The analysis reveals 50${\Omega}$ active matching and RF gain is prohibitive for 50${\mu}$W power-budget. A mixer-first architecture with an N-path mixer and a self-biased inverter based baseband LNA, designed in TSMC 65nm technology show that sub 50${\mu}$W performance can be achieved up to 10Mbps (< 5pJ/b) with OOK modulation.Comment: Accepted to appear on International Conference on VLSI Design 2018 (VLSID

Parametric analog signal amplification applied to nanoscale cmos wireless digital transceivers

Thesis presented in partial fulfillment of the requirements for the degree of Doctor of Philosophy in the subject of Electrical and Computer Engineering by the Universidade Nova de Lisboa,Faculdade de Ciências e TecnologiaSignal amplification is required in almost every analog electronic system. However noise is also present, thus imposing limits to the overall circuit performance, e.g., on the sensitivity of the radio transceiver. This drawback has triggered a major research on the field, which has been producing several solutions to achieve amplification with minimum added noise. During the Fifties, an interesting out of mainstream path was followed which was based on variable reactance instead of resistance based amplifiers. The principle of these parametric circuits permits to achieve low noise amplifiers since the controlled variations of pure reactance elements is intrinsically noiseless. The amplification is based on a mixing effect which enables energy transfer from an AC pump source to other related signal frequencies. While the first implementations of these type of amplifiers were already available at that time, the discrete-time version only became visible more recently. This discrete-time version is a promising technique since it is well adapted to the mainstream nanoscale CMOS technology. The technique itself is based on the principle of changing the surface potential of the MOS device while maintaining the transistor gate in a floating state. In order words, the voltage amplification is achieved by changing the capacitance value while maintaining the total charge unchanged during an amplification phase. Since a parametric amplifier is not intrinsically dependent on the transconductance of the MOS transistor, it does not directly suffer from the intrinsic transconductance MOS gain issues verified in nanoscale MOS technologies. As a consequence, open-loop and opamp free structures can further emerge with this additional contribution. This thesis is dedicated to the analysis of parametric amplification with special emphasis on the MOS discrete-time implementation. The use of the latter is supported on the presentation of several circuits where the MOS Parametric Amplifier cell is well suited: small gain amplifier, comparator, discrete-time mixer and filter, and ADC. Relatively to the latter, a high speed time-interleaved pipeline ADC prototype is implemented in a,standard 130 nm CMOS digital technology from United Microelectronics Corporation (UMC). The ADC is fully based on parametric MOS amplification which means that one could achieve a compact and MOS-only implementation. Furthermore, any high speed opamp has not been used in the signal path, being all the amplification steps implemented with open-loop parametric MOS amplifiers. To the author’s knowledge, this is first reported pipeline ADC that extensively used the parametric amplification concept.Fundação para a Ciência e Tecnologia through the projects SPEED, LEADER and IMPAC

Energy-efficient analog-to-digital conversion for ultra-wideband radio

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.Includes bibliographical references (p. 207-222).In energy constrained signal processing and communication systems, a focus on the analog or digital circuits in isolation cannot achieve the minimum power consumption. Furthermore, in advanced technologies with significant variation, yield is traditionally achieved only through conservative design and a sacrifice of energy efficiency. In this thesis, these limitations are addressed with both a comprehensive mixed-signal design methodology and new circuits and architectures, as presented in the context of an analog-to-digital converter (ADC) for ultra-wideband (UWB) radio. UWB is an emerging technology capable of high-data-rate wireless communication and precise locationing, and it requires high-speed (>500MS/s), low-resolution ADCs. The successive approximation register (SAR) topology exhibits significantly reduced complexity compared to the traditional flash architecture. Three time-interleaved SAR ADCs have been implemented. At the mixed-signal optimum energy point, parallelism and reduced voltage supplies provide more than 3x energy savings. Custom control logic, a new capacitive DAC, and a hierarchical sampling network enable the high-speed operation. Finally, only a small amount of redundancy, with negligible power penalty, dramatically improves the yield of the highly parallel ADC in deep sub-micron CMOS.by Brian P. Ginsburg.Ph.D

A Novel Long-Range Passive UHF RFID System over Twisted-pair Cable

Radio Frequency Identification (RFID) is one of the most representative, rapidly growing, and highly extendable technologies, which uses electromagnetic waves in accordance with specific communications standards and regulations to identify, track, or even localise desired objects. However, due to its high cost, limited read range, and uncertain reliability, its adoption still lags, especially in large-scale organisations. Even though an RFID distributed antenna system (DAS) can greatly improve the detection range and read rate of a single reader when system uses different combinations of antenna states with frequency and phase hopping, the lossy and heavy coaxial cables between reader and antennas still limits the system coverage and design flexibility for wide-area passive UHF RFID applications. In order to develop a cost-efficient and flexibly-installed passive RFID DAS, a novel large-range passive UHF RFID system over twisted-pair cable is proposed in this dissertation. This new system consists of one baseband central controller and one antenna subsystem, connected by a commonly used twisted-pair cable. It is shown that transmitting/receiving low frequency baseband signals over a twisted-pair cable can significantly reduce cable attenuation and extend the communication distance. A simulation is conducted to demonstrate that frequency and phase hopping can also be remotely controlled to fit this system structure by slightly varying the frequency or phase of the input reference signal of the frequency synthesis system. The features of twisted-pair cable in terms of its low cost, light weight, and bend radius greatly improve the design and installation flexibility of an RFID system. The implemented system is designed based on the ISO 18000-6C and EPC Class 1 Generation 2 standards, and can operate according to FCC (902-928 MHz) and ETSI (865-868MHz) regulations. The results of the measurement show the reader can achieve a sensitivity of - 94.5 dBm over 30 m Cat5e cable, and its sensitivity can still remain at around -94.2 dBm over 150 m Cat5e cable. The experimental results of tag detection show that the passive tags can be successfully detected over a 6 m wireless range following a 300 m of twisted-pair cable between the central controller and antenna. This detection range cannot be achieved by existing commercial RFID systems. Since the transmission and reception in a RFID system are simultaneous, finite isolation of the circulator/directional coupler and environmentally dependent reflection ratio of the antenna lead to serious leakage problems. Leakage can directly cause sensitivity degradation due to saturation of the RF components. A fast leakage suppression block is developed in efforts to solve this problem. Measurements show that this new canceller can deliver an average suppression of 36.9 dB, and this excellent performance remains when the system uses frequency hopping. With help of an improved scanning algorithm, this canceller can find its optimal status within 38 ms, and this settling time is short enough for most commercial RFID readers. By reducing the number of voltage samples taken, the convergence time can be further improved. To fully investigate this new passive UHF RFID system value, a comparison study between the new system and a commercial system is conducted. This new automatic passive UHF RFID system is confirmed to deliver high performance long-range passive tag detection. Particular advantages are shown in the fast tag read rate and capability of uplink SNR improvement. This novel system is also superior to conventional RFID systems in terms of link distance, link cost, and installation flexibility