A 0.18µm CMOS UWB wireless transceiver for medical sensing applications

Recently, there is a new trend of demand of a biomedical device that can continuously monitor patient’s vital life index such as heart rate variability (HRV) and respiration rate. This desired device would be compact, wearable, wireless, networkable and low-power to enable proactive home monitoring of vital signs. This device should have a radar sensor portion and a wireless communication link all integrated in one small set. The promising technology that can satisfy these requirements is the impulse radio based Ultra-wideband (IR-UWB) technology. Since Federal Communications Commission (FCC) released the 3.1GHz-10.6GHz frequency band for UWB applications in 2002 [1], IR-UWB has received significant attention for applications in target positioning and wireless communications. IR-UWB employs extremely narrow Gaussian monocycle pulses or any other forms of short RF pulses to represent information. In this project, an integrated wireless UWB transceiver for the 3.1GHz-10.6GHz IR-UWB medical sensor was developed in the 0.18µm CMOS technology. This UWB transceiver can be employed for both radar sensing and communication purposes. The transceiver applies the On-Off Keying (OOK) modulation scheme to transmit short Gaussian pulse signals. The transmitter output power level is adjustable. The fully integrated UWB transceiver occupies a core area of 0.752mm^2 and the total die area of 1.274mm^2 with the pad ring inserted. The transceiver was simulated with overall power consumption of 40mW for radar sensing. The receiver is very sensitive to weak signals with a sensitivity of -73.01dBm. The average power of a single pulse is 9.8µW. The pulses are not posing any harm to human tissues. The sensing resolution and the target positioning precision are presumably sufficient for heart movement detection purpose in medical applications. This transceiver can also be used for high speed wireless data communications. The data transmission rate of 200 Mbps was achieved with an overall power consumption of 57mW. A combination of sensing and communications can be used to build a low power sensor

A Review of CMOS Low Noise Amplifier for UWB System

A number of CMOS low noise amplifier (LNA) design for ultra-wideband (UWB) application had been produced with a various topology and techniques from year 2004 to 2016. The performance of LNA such as frequency bandwidth, noise figure, input and output matching and gain depend with the choice of the topology and technique used. Among the techniques introduced are current reuse, common source, resistive feedback, common gate, Chebyshev filter, distributed amplifier, folded cascade and negative feedback. This paper presents the collection of review about design of low noise amplifier used for UWB application in term of topology circuit. Thus, the problem and limitation of the CMOS LNA for UWB application are reviewed. Furthermore, recent developments of CMOS LNAs are examined and a comparison of the performance criteria of various topologies is presented

High Efficiency, Good phase linearity 0.18 µm CMOS Power Amplifier for MBAN-UWB Applications

This paper presents the design of 3.1-10.6 GHz class AB power amplifier (PA) suitable for medical body area network (MBAN) Ultra-Wide Band (UWB) applications in TSMC 0.18 µm technology. An optimization technique to simultaneously maximize power added efficiency(PAE) and minimize group delay variation is employed. Source and Load-pull contours are used to design inter and output stage matching circuits. The post-layout simulation results indicated that the designed PA has a maximum PAE of 32 % and an output 1-dB compression of 11 dBm at 4 GHz. In addition, a small group delay variation of ± 50 ps was realized over the whole required frequency band . Moreover, the proposed PA has small signal power gain (S21) of 12.5 dB with ripple less than 1.5 dB over the frequency range between 3.1 GHz to 10.6 GHz, while consuming 36 mW

CMOS Integrated Circuit Design for Ultra-Wideband Transmitters and Receivers

Ultra-wideband technology (UWB) has received tremendous attention since the FCC license release in 2002, which expedited the research and development of UWB technologies on consumer products. The applications of UWB range from ground penetrating radar, distance sensor, through wall radar to high speed, short distance communications. The CMOS integrated circuit is an attractive, low cost approach for implementing UWB technology. The improving cut-off frequency of the transistor in CMOS process makes the CMOS circuit capable of handling signal at multi-giga herz. However, some design challenges still remain to be solved. Unlike regular narrow band signal, the UWB signal is discrete pulse instead of continuous wave (CW), which results in the occupancy of wide frequency range. This demands that UWB front-end circuits deliver both time domain and frequency domain signal processing over broad bandwidth. Witnessing these technique challenges, this dissertation aims at designing novel, high performance components for UWB signal generation, down-conversion, as well as accurate timing control using low cost CMOS technology. We proposed, designed and fabricated a carrier based UWB transmitter to facilitate the discrete feature of the UWB signal. The transmitter employs novel twostage -switching to generate carrier based UWB signal. The structure not only minimizes the current consumption but also eliminates the use of a UWB power amplifier. The fabricated transmitter is capable of delivering tunable UWB signal over the complete 3.1GHz -10.6GHz UWB band. By applying the similar two-stage switching approach, we were able to implement a novel switched-LNA based UWB sampling receiver frontend. The proposed front-end has significantly lower power consumption compared to previously published design while keep relatively high gain and low noise at the same time. The designed sampling mixer shows unprecedented performance of 9-12dB voltage conversion gain, 16-25dB noise figure, and power consumption of only 21.6mW(with buffer) and 11.7mW(without buffer) across dc to 3.5GHz with 100M-Hz sampling frequency. The implementation of a precise delay generator is also presented in the dissertation. It relies on an external reference clock to provide accurate timing against process, supply voltage and temperature variation through a negative feedback loop. The delay generator prototype has been verified having digital programmability and tunable delay step resolution. The relative delay shift from desired value is limited to within 0.2%

Ultra-wideband CMOS power amplifier for wireless body area network applications: a review

A survey on ultra-wideband complementary metal-oxide semiconductor (CMOS) power amplifiers for wireless body area network (WBAN) applications is presented in this paper. Formidable growth in the CMOS integrated circuits technology enhances the development in biomedical manufacture. WBAN is a promising mechanism that collects essential data from wearable sensors connected to the network and transmitted it wirelessly to a central patient monitoring station. The ultra-wideband (UWB) technology exploits the frequency band from 3.1 to 10.6 GHz and provides no interference to other communication systems, low power consumption, low-radiated power, and high data rate. These features permit it to be compatible with medical applications. The demand target is to have one transceiver integrated circuit (IC) for WBAN applications, consequently, UWB is utilized to decrease the hardware complexity. The power amplifier (PA) is the common electronic device that employing in the UWB transmitter to boost the input power to the desired output power and then feed it to the antenna of the transmitter. The advance in the design and implementation of ultra-wideband CMOS power amplifiers enhances the performance of the UWB-transceivers for WBAN applications. A review of recently published CMOS PA designs is reported in this paper with comparison tables listing wideband power amplifiers' performance

High performance building blocks for wireless receiver: multi-stage amplifiers and low noise amplifiers

Different wireless communication systems utilizing different standards and for multiple applications have penetrated the normal people's life, such as Cell phone, Wireless LAN, Bluetooth, Ultra wideband (UWB) and WiMAX systems. The wireless receiver normally serves as the primary part of the system, which heavily influences the system performance. This research concentrates on the designs of several important blocks of the receiver; multi-stage amplifier and low noise amplifier. Two novel multi-stage amplifier typologies are proposed to improve the bandwidth and reduce the silicon area for the application where a large capacitive load exists. They were designed using AMI 0.5 m µ CMOS technology. The simulation and measurement results show they have the best Figure-of-Merits (FOMs) in terms of small signal and large signal performances, with 4.6MHz and 9MHz bandwidth while consuming 0.38mW and 0.4mW power from a 2V power supply. Two Low Noise Amplifiers (LNAs) are proposed, with one designed for narrowband application and the other for UWB application. A noise reduction technique is proposed for the differential cascode Common Source LNA (CS-LNA), which reduces the LNA Noise Figure (NF), increases the LNA gain, and improves the LNA linearity. At the same time, a novel Common Gate LNA (CG-LNA) is proposed for UWB application, which has better linearity, lower power consumption, and reasonable noise performance. Finally a novel practical current injection built-in-test (BIT) technique is proposed for the RF Front-end circuits. If the off-chip component Lg and Rs values are well controlled, the proposed technique can estimate the voltage gain of the LNA with less than 1dB (8%) error

System-level design and RF front-end implementation for a 3-10ghz multiband-ofdm ultrawideband receiver and built-in testing techniques for analog and rf integrated circuits

This work consists of two main parts: a) Design of a 3-10GHz UltraWideBand (UWB) Receiver and b) Built-In Testing Techniques (BIT) for Analog and RF circuits. The MultiBand OFDM (MB-OFDM) proposal for UWB communications has received significant attention for the implementation of very high data rate (up to 480Mb/s) wireless devices. A wideband LNA with a tunable notch filter, a downconversion quadrature mixer, and the overall radio system-level design are proposed for an 11-band 3.4-10.3GHz direct conversion receiver for MB-OFDM UWB implemented in a 0.25mm BiCMOS process. The packaged IC includes an RF front-end with interference rejection at 5.25GHz, a frequency synthesizer generating 11 carrier tones in quadrature with fast hopping, and a linear phase baseband section with 42dB of gain programmability. The receiver IC mounted on a FR-4 substrate provides a maximum gain of 67-78dB and NF of 5-10dB across all bands while consuming 114mA from a 2.5V supply. Two BIT techniques for analog and RF circuits are developed. The goal is to reduce the test cost by reducing the use of analog instrumentation. An integrated frequency response characterization system with a digital interface is proposed to test the magnitude and phase responses at different nodes of an analog circuit. A complete prototype in CMOS 0.35mm technology employs only 0.3mm2 of area. Its operation is demonstrated by performing frequency response measurements in a range of 1 to 130MHz on 2 analog filters integrated on the same chip. A very compact CMOS RF RMS Detector and a methodology for its use in the built-in measurement of the gain and 1dB compression point of RF circuits are proposed to address the problem of on-chip testing at RF frequencies. The proposed device generates a DC voltage proportional to the RMS voltage amplitude of an RF signal. A design in CMOS 0.35mm technology presents and input capacitance <15fF and occupies and area of 0.03mm2. The application of these two techniques in combination with a loop-back test architecture significantly enhances the testability of a wireless transceiver system

Developing UWB Pulse Generator with Output Split Inverters for Breast Imaging System

A digital glitch monocycle pulse generator in a standard 0.13-?m CMOS technology is designed for breas

Theoretical and experimental investigations of passive and integrated antennas

Ph.DDOCTOR OF PHILOSOPH