Low Power Circuits for Miniature Sensor Systems.

With the development of VLSI technologies, the sensor systems of all kinds of applications have entered our everyday's life. For specific applications such as medical implants, the form factor of such systems is the crucial concern. In order to minimize of size of the power sources with a given lifetime, the ability to operate the system with low power consumption is the key. An effective way of lowering the active power dissipation is through aggressive voltage scaling. For minimal energy operation, the optimum supply voltage is typical lower than the subthreshold voltage. On the other hand, a sensor system spends most of the time idling while only actively obtaining data in a short period of time. As a result, strong power gating is needed for reducing the leakage power. We discuss the design challenges for several building blocks for the sensor system that have not been gotten much emphasis in term of power consumption. To monitor the period for idle time and to wake up the system periodically, two types of ultra low power timers are proposed. The first one utilizes the gate leakage of a MOS transistor to achieve low temperature dependency and large time constant. The second one implements a program-and-hold technique to compensate for the temperature coefficient of a one-shot oscillator with 150pW of average power. We propose a low power temperature sensor that is suitable for passive RFID transponder. To retrieve the data out of the sensor chip, two passive proximity communication schemes are presented. Capacitive coupling can be used for chips on a stack where the key challenge is misalignment. A alignment detection and microplate reconfiguration method is proposed to solve the problem. We also propose a passive inductive coupling scheme using pulse signaling. Compared to the traditional backscattering technique, the limitations on the quality factor of the inductor and the signal sensitivity of the receiver can be relaxed.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/61782/1/yushiang_1.pd

Collective analog bioelectronic computation

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.Cataloged from student submitted PDF version of thesis.Includes bibliographical references (p. 677-710).In this thesis, I present two examples of fast-and-highly-parallel analog computation inspired by architectures in biology. The first example, an RF cochlea, maps the partial differential equations that describe fluid-membrane-hair-cell wave propagation in the biological cochlea to an equivalent inductor-capacitor-transistor integrated circuit. It allows ultra-broadband spectrum analysis of RF signals to be performed in a rapid low-power fashion, thus enabling applications for universal or software radio. The second example exploits detailed similarities between the equations that describe chemical-reaction dynamics and the equations that describe subthreshold current flow in transistors to create fast-and-highly-parallel integrated-circuit models of protein-protein and gene-protein networks inside a cell. Due to a natural mapping between the Poisson statistics of molecular flows in a chemical reaction and Poisson statistics of electronic current flow in a transistor, stochastic effects are automatically incorporated into the circuit architecture, allowing highly computationally intensive stochastic simulations of large-scale biochemical reaction networks to be performed rapidly. I show that the exponentially tapered transmission-line architecture of the mammalian cochlea performs constant-fractional-bandwidth spectrum analysis with O(N) expenditure of both analysis time and hardware, where N is the number of analyzed frequency bins. This is the best known performance of any spectrum-analysis architecture, including the constant-resolution Fast Fourier Transform (FFT), which scales as O(N logN), or a constant-fractional-bandwidth filterbank, which scales as O (N2).(cont.) The RF cochlea uses this bio-inspired architecture to perform real-time, on-chip spectrum analysis at radio frequencies. I demonstrate two cochlea chips, implemented in standard 0.13m CMOS technology, that decompose the RF spectrum from 600MHz to 8GHz into 50 log-spaced channels, consume < 300mW of power, and possess 70dB of dynamic range. The real-time spectrum analysis capabilities of my chips make them uniquely suitable for ultra-broadband universal or software radio receivers of the future. I show that the protein-protein and gene-protein chips that I have built are particularly suitable for simulation, parameter discovery and sensitivity analysis of interaction networks in cell biology, such as signaling, metabolic, and gene regulation pathways. Importantly, the chips carry out massively parallel computations, resulting in simulation times that are independent of model complexity, i.e., O(1). They also automatically model stochastic effects, which are of importance in many biological systems, but are numerically stiff and simulate slowly on digital computers. Currently, non-fundamental data-acquisition limitations show that my proof-of-concept chips simulate small-scale biochemical reaction networks at least 100 times faster than modern desktop machines. It should be possible to get 103 to 106 simulation speedups of genome-scale and organ-scale intracellular and extracellular biochemical reaction networks with improved versions of my chips. Such chips could be important both as analysis tools in systems biology and design tools in synthetic biology.by Soumyajit Mandal.Ph.D

Topical Workshop on Electronics for Particle Physics

The purpose of the workshop was to present results and original concepts for electronics research and development relevant to particle physics experiments as well as accelerator and beam instrumentation at future facilities; to review the status of electronics for the LHC experiments; to identify and encourage common efforts for the development of electronics; and to promote information exchange and collaboration in the relevant engineering and physics communities