37,906 research outputs found
60 GHz High Data Rate Wireless Communication System
This paper presents the design and the realization of a 60 GHz wireless
Gigabit Ethernet communication system. A differential encoded binary phase
shift keying modulation (DBPSK) and differential demodulation schemes are
adopted for the IF blocks. The Gigabit Ethernet interface allows a high speed
transfer of multimedia files via a 60 GHz wireless link. First measurement
results are shown for 875 Mbps data rate.Comment: 5 pages
Indoor Channel Measurements and Communications System Design at 60 GHz
This paper presents a brief overview of several studies concerning the indoor
wireless communications at 60 GHz performed by the IETR. The characterization
and the modeling of the radio propagation channel are based on several
measurement campaigns realized with the channel sounder developed at IETR. Some
typical residential environments were also simulated by ray tracing and
Gaussian Beam Tracking. The obtained results show a good agreement with the
similar experimental results. Currently, the IETR is developing a high data
rate wireless communication system operating at 60 GHz. The single-carrier
architecture of this system is also presented.Comment: 2 page
Trends and Challenges in CMOS Design for Emerging 60 GHz WPAN Applications
International audienceThe extensive growth of wireless communications industry is creating a big market opportunity. Wireless operators are currently searching for new solutions which would be implemented into the existing wireless communication networks to provide the broader bandwidth, the better quality and new value-added services. In the last decade, most commercial efforts were focused on the 1-10 GHz spectrum for voice and data applications for mobile phones and portable computers (Niknejad & Hashemi, 2008). Nowadays, the interest is growing in applications that use high rate wireless communications. Multigigabit- per-second communication requires a very large bandwidth. The Ultra-Wide Band (UWB) technology was basically used for this issue. However, this technology has some shortcomings including problems with interference and a limited data rate. Furthermore, the 3-5 GHz spectrum is relatively crowded with many interferers appearing in the WiFi bands (Niknejad & Hashemi, 2008). The use of millimeter wave frequency band is considered the most promising technology for broadband wireless. In 2001, the Federal Communications Commission (FCC) released a set of rules governing the use of spectrum between 57 and 66 GHz (Baldwin, 2007). Hence, a large bandwidth coupled with high allowable transmit power equals high possible data rates. Traditionally the implementation of 60 GHz radio technology required expensive technologies based on III-V compound semiconductors such as InP and GaAs (Smulders et al., 2007). The rapid progress of CMOS technology has enabled its application in millimeter wave applications. Currently, the transistors became small enough, consequently fast enough. As a result, the CMOS technology has become one of the most attractive choices in implementing 60 GHz radio due to its low cost and high level of integration (Doan et al., 2005). Despite the advantages of CMOS technology, the design of 60 GHz CMOS transceiver exhibits several challenges and difficulties that the designers must overcome. This chapter aims to explore the potential of the 60 GHz band in the use for emergent generation multi-gigabit wireless applications. The chapter presents a quick overview of the state-of-the-art of 60 GHz radio technology and its potentials to provide for high data rate and short range wireless communications. The chapter is organized as follows. Section 2 presents an overview about 60 GHz band. The advantages are presented to highlight the performance characteristics of this band. The opportunities of the physical layer of the IEEE 802.15.3c standard for emerging WPAN applications are discussed in section 3. The tremendous opportunities available with CMOS technology in the design of 60 GHz radio is discussed in section 4. Section 5 shows an example of 60 GHz radio system link. Some challenges and trade-offs on the design issues of circuits and systems for 60 GHz band are reported in section 6. Finally, section 7 presents the conclusion and some perspectives on future directions
Full duplex 60 GHz millimeter wave transmission over multi-mode fiber
Copyright @ 2010 IEEENew wireless subscribers are signing up at an increasing demand of more capacity for ultra-high data rate transfers at speeds more than 1 Gbps, while the radio spectrum is limited. Millimeter wave communication system offers a unique way to resolve these problems. In this paper, the performance of a full duplex transportation system is reported for 1.5 Km of multi-mode fiber length for a sample 10 Gbit/s pseudo random sequence data, with quadrature amplitude modulation mapping and orthogonal frequency division multiplexing modulation with 60 GHz RF and coherent 1550 nm optical carrier. The analysis and simulation results show that the system's quality of service depends on nonlinearity of electro optical modulator, dispersion and signal attenuation impairment of the multi-mode fiber cable
Système de Communications Sans Fil Très Haut Débit à 60 GHz
National audienceThis paper presents the study and the realization at IETR of a high data rate 60 GHz wireless communications system. The system uses a simple single carrier architecture. The receiver architecture is based on a differential demodulation which minimizes the intersymbol interference (ISI) effect and a signal processing unit composed of a joint frame and byte synchronization block and a conventional RS (255, 239) decoder. The byte synchronization technique provides a high preamble detection probability and a very small value of the false detection probability. First measurement results show a good communication link quality in line of sight environments with directional antennas
Gbps wireless transceiver for high bandwidth interconnections in distributed cyber physical systems
In Cyber Physical Systems there is a growing use of high speed sensors like photo and video camera, radio and light detection and ranging (Radar/Lidar) sensors. Hence Cyber Physical Systems can benefit from the high communication data rate, several Gbps, that can be provided by mm-wave wireless transceivers. At such high frequency the wavelength is few mm and hence the whole transciever including the antenna can be integrated in a single chip. To this aim this paper presents the design of 60 GHz transciever architecture to ensure connection distances up to 10 m and data rate up to 4 Gbps. At 60 GHz there are more than 7 GHz of unlicensed bandwidth (available for free for development of new services). By using a CMOS SOI technology RF, analog and digital baseband circuitry can be integrated in the same chip minimizing noise coupling. Even the antenna is integrated on chip reducing cost and size vs. classic off-chip antenna solutions. Therefore the proposed transciever can enable at physical layer the implementation of low cost nodes for a Cyber Physical System with data rates of several Gbps and with a communication distance suitable for home/office scenarios, or on-board vehicles such as cars, trains, ships, airplanes
Innovative Techniques for 60-GHz On-Chip Antennas on CMOS Substrate
The 60-GHz band has a 7-GHz of bandwidth enabling high data rate wireless communication. Also, it has a short wavelength allowing for passive devices integration into a chip, that is, fully integrated system-on-chip (SOC) is possible. This chapter features the design, implementation, and measurements of 60-GHz on-chip antennas (OCAs) on complementary-metal-oxide-semiconductor (CMOS) technology. OCAs are the primary barrier for the SOC solution due to their limited performance. This degraded performance comes from the low resistivity and the high permittivity of the CMOS substrate. We present here two innovative techniques to improve the CMOS OCAs’ performance. The first method utilizes artificial magnetic conductors to shield the OCA electromagnetically from the CMOS substrate. The second methodology employs the PN-junction properties to create a high resistivity layer. Both approaches target the mitigation of the losses of the CMOS substrate; hence, the radiation performance characteristics of the OCAs are enhanced
Wireless wire - ultra-low-power and high-data-rate wireless communication systems
With the rapid development of communication technologies, wireless personal-area communication systems gain momentum and become increasingly important. When the market gets gradually saturated and the technology becomes much more mature, new demands on higher throughput push the wireless communication further into the high-frequency and high-data-rate direction. For example, in the IEEE 802.15.3c standard, a 60-GHz physical layer is specified, which occupies the unlicensed 57 to 64 GHz band and supports gigabit links for applications such as wireless downloading and data streaming. Along with the progress, however, both wireless protocols and physical systems and devices start to become very complex. Due to the limited cut-off frequency of the technology and high parasitic and noise levels at high frequency bands, the power consumption of these systems, especially of the RF front-ends, increases significantly. The reason behind this is that RF performance does not scale with technology at the same rate as digital baseband circuits. Based on the challenges encountered, the wireless-wire system is proposed for the millimeter wave high-data-rate communication. In this system, beamsteering directional communication front-ends are used, which confine the RF power within a narrow beam and increase the level of the equivalent isotropic radiation power by a factor equal to the number of antenna elements. Since extra gain is obtained from the antenna beamsteering, less front-end gain is required, which will reduce the power consumption accordingly. Besides, the narrow beam also reduces the interference level to other nodes. In order to minimize the system average power consumption, an ultra-low power asynchronous duty-cycled wake-up receiver is added to listen to the channel and control the communication modes. The main receiver is switched on by the wake-up receiver only when the communication is identified while in other cases it will always be in sleep mode with virtually no power consumed. Before transmitting the payload, the event-triggered transmitter will send a wake-up beacon to the wake-up receiver. As long as the wake-up beacon is longer than one cycle of the wake-up receiver, it can be captured and identified. Furthermore, by adopting a frequency-sweeping injection locking oscillator, the wake-up receiver is able to achieve good sensitivity, low latency and wide bandwidth simultaneously. In this way, high-data-rate communication can be achieved with ultra-low average power consumption. System power optimization is achieved by optimizing the antenna number, data rate, modulation scheme, transceiver architecture, and transceiver circuitries with regards to particular application scenarios. Cross-layer power optimization is performed as well. In order to verify the most critical elements of this new approach, a W-band injection-locked oscillator and the wake-up receiver have been designed and implemented in standard TSMC 65-nm CMOS technology. It can be seen from the measurement results that the wake-up receiver is able to achieve about -60 dBm sensitivity, 10 mW peak power consumption and 8.5 µs worst-case latency simultaneously. When applying a duty-cycling scheme, the average power of the wake-up receiver becomes lower than 10 µW if the event frequency is 1000 times/day, which matches battery-based or energy harvesting-based wireless applications. A 4-path phased-array main receiver is simulated working with 1 Gbps data rate and on-off-keying modulation. The average power consumption is 10 µW with 10 Gb communication data per day
Millimeter-Wave Super-Regenerative Receivers for Wireless Communication and Radar
Today’s world is becoming increasingly automated and interconnected with billions of smart devices coming online, leading to a steep rise in energy consumption from small microelectronics. This coincides with an urgent push to transform global energy production to green energies, causing disruptions and energy shortages, and making the case for efficient energy use ever more pressing. Two major areas where high growth is expected are the fields of wireless communication and radar sensors. Millimeter-wave frequency bands are planned for fifth-generation (5G) and sixth-generation (6G) cellular communication standards, as well as automotive frequency-modulated continuous wave (FMCW) radar systems for driving assistance and automation. Fast silicon-based technologies enable these advances by operating at high maximum frequencies, such as the silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technologies. However, even the fastest transistors suffer from low and energy expensive gains at millimeter-wave frequencies.
Rather than incremental improvements in circuit efficiency using conventional approaches, a disruptive revolution for green microelectronics could be enabled by exploring the low-power benefits of the super-regenerative receiver for some applications. The super-regenerative receiver uses a regenerative oscillator circuit to increase the gain by positive feedback, through coupling energy from the output back into the input. Careful bias and control of the circuit enables a very large gain from a small number of transistors and a very low energy dissipation. Thus, the super-regenerative oscillator could be used to replace amplifier circuits in high data rate wireless communication systems, or as active reflectors to increase the range of FMCW radar systems, greatly reducing the power consumption.
The work in this thesis presents fundamental scientific research into the topic of energy-efficient millimeter-wave super-regenerative receivers for use in civilian wireless communication and radar applications. This research work covers the theory, analysis, and simulations, all the way up to the proof of concept, hardware realization, and experimental characterization. Analysis and modeling of regenerative oscillator circuits is presented and used to improve the understanding of the circuit operation, as well as design goals according to the specific application needs. Integrated circuits are investigated and characterized as a proof of concept for a high data rate wireless communication system operating between 140–220 GHz, and an automotive radar system operating at 60 GHz. Amplitude and phase regeneration capabilities for complex modulation are investigated, and principles for spectrum characterization are derived. The circuits are designed and fabricated in a 130 nm SiGe HBT technology, combining bipolar and complementary metal-oxide semiconductor (BiCMOS) transistors.
To prove the feasibility of the research concepts, the work achieves a wireless communication link at 16 Gbit/s over 20 cm distance with quadrature amplitude modulation (QAM), which is a world record for the highest data rate ever reported in super-regenerative circuits. This was powered by a super-regenerative oscillator circuit operating at 180 GHz and providing 58 dB of gain. Energy efficiency is also considerably high, drawing 8.8 mW of dc power consumption, which corresponds to a highly efficient 0.6 pJ/bit. Packaging and module integration innovations were implemented for the system experiments, and additional broadband circuits were investigated to generate custom quench waveforms to further enhance the data rate. For radar active reflectors, a regenerative gain of 80 dB is achieved at 60 GHz from a single circuit, which is the best in its frequency range, despite a low dc power consumption of 25 mW
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