3 research outputs found
FeCAM: A Universal Compact Digital and Analog Content Addressable Memory Using Ferroelectric
Ferroelectric field effect transistors (FeFETs) are being actively
investigated with the potential for in-memory computing (IMC) over other
non-volatile memories (NVMs). Content Addressable Memories (CAMs) are a form of
IMC that performs parallel searches for matched entries over a memory array for
a given input query. CAMs are widely used for data-centric applications that
involve pattern matching and search functionality. To accommodate the ever
expanding data, it is attractive to resort to analog CAM for memory density
improvement. However, the digital CAM design nowadays based on standard CMOS or
emerging nonvolatile memories (e.g., resistive storage devices) is already
challenging due to area, power, and cost penalties. Thus, it can be extremely
expensive to achieve analog CAM with those technologies due to added cell
components. As such, we propose, for the first time, a universal compact FeFET
based CAM design, FeCAM, with search and storage functionality enabled in
digital and analog domain simultaneously. By exploiting the multi-level-cell
(MLC) states of FeFET, FeCAM can store and search inputs in either digital or
analog domain. We perform a device-circuit co-design of the proposed FeCAM and
validate its functionality and performance using an experimentally calibrated
FeFET model. Circuit level simulation results demonstrate that FeCAM can either
store continuous matching ranges or encode 3-bit data in a single CAM cell.
When compared with the existing digital CMOS based CAM approaches, FeCAM is
found to improve both memory density by 22.4X and energy saving by 8.6/3.2X for
analog/digital modes, respectively. In the CAM-related application, our
evaluations show that FeCAM can achieve 60.5X/23.1X saving in area/search
energy compared with conventional CMOS based CAMs.Comment: 8 pages, 8 figures, accepte
Compact and High-Performance TCAM Based on Scaled Double-Gate FeFETs
Ternary content addressable memory (TCAM), widely used in network routers and
high-associativity caches, is gaining popularity in machine learning and
data-analytic applications. Ferroelectric FETs (FeFETs) are a promising
candidate for implementing TCAM owing to their high ON/OFF ratio,
non-volatility, and CMOS compatibility. However, conventional single-gate
FeFETs (SG-FeFETs) suffer from relatively high write voltage, low endurance,
potential read disturbance, and face scaling challenges. Recently, a
double-gate FeFET (DG-FeFET) has been proposed and outperforms SG-FeFETs in
many aspects. This paper investigates TCAM design challenges specific to
DG-FeFETs and introduces a novel 1.5T1Fe TCAM design based on DG-FeFETs. A
2-step search with early termination is employed to reduce the cell area and
improve energy efficiency. A shared driver design is proposed to reduce the
peripherals area. Detailed analysis and SPICE simulation show that the 1.5T1Fe
DG-TCAM leads to superior search speed and energy efficiency. The 1.5T1Fe TCAM
design can also be built with SG-FeFETs, which achieve search latency and
energy improvement compared with 2FeFET TCAM.Comment: Accepted by Design Automation Conference (DAC) 202
Analog content addressable memories with memristors
A content-addressable-memory compares an input search word against all rows
of stored words in an array in a highly parallel manner. While supplying a very
powerful functionality for many applications in pattern matching and search, it
suffers from large area, cost and power consumption, limiting its use. Past
improvements have been realized by using memristors to replace the
static-random-access-memory cell in conventional designs, but employ similar
schemes based only on binary or ternary states for storage and search.
We propose a new analog content-addressable-memory concept and circuit to
overcome these limitations by utilizing the analog conductance tunability of
memristors. Our analog content-addressable-memory stores data within the
programmable conductance and can take as input either analog or digital search
values. Experimental demonstrations, scaled simulations and analysis show that
our analog content-addressable-memory can reduce area and power consumption,
which enables the acceleration of existing applications, but also new computing
application areas