Inferring Temporal Behaviours Through Kernel Tracing

In order to provide reliable system support for real-time applications, it is often important to be able to collect statistics about the tasks temporal behaviours (in terms of execution times and inter-arrival times). Such statistics can, for example, be used to provide a-priori schedulability guarantees, or to perform some kind of on-line adaptation of the scheduling parameters (adaptive scheduling, or feedback scheduling). This work shows how the Linux kernel allows to collect such statistics by using an internal function tracer called Ftrace. Based on this feature, tools can be developed to evaluate the real-time performance of a system or an application, to debug real-time applications, and/or to infer the temporal properties (for example, periodicity) of tasks running in the system

Adaptive Resource Management for Uncertain Execution Platforms

Embedded systems are becoming increasingly complex. At the same time, the components that make up the system grow more uncertain in their properties. For example, current developments in CPU design focuses on optimizing for average performance rather than better worst case performance. This, combined with presence of 3rd party software components with unknown properties, makes resource management using prior knowledge less and less feasible. This thesis presents results on how to model software components so that resource allocation decisions can be made on-line. Both the single and multiple resource case is considered as well as extending the models to include resource constraints based on hardware dynam- ics. Techniques for estimating component parameters on-line are presented. Also presented is an algorithm for computing an optimal allocation based on a set of convex utility functions. The algorithm is designed to be computationally efficient and to use simple mathematical expres- sions that are suitable for fixed point arithmetics. An implementation of the algorithm and results from experiments is presented, showing that an adaptive strategy using both estimation and optimization can outperform a static approach in cases where uncertainty is high

A Time-predictable Memory Network-on-Chip

To derive safe bounds on worst-case execution times (WCETs), all components of a computer system need to be time-predictable: the processor pipeline, the caches, the memory controller, and memory arbitration on a multicore processor. This paper presents a solution for time-predictable memory arbitration and access for chip-multiprocessors. The memory network-on-chip is organized as a tree with time-division multiplexing (TDM) of accesses to the shared memory. The TDM based arbitration completely decouples processor cores and allows WCET analysis of the memory accesses on individual cores without considering the tasks on the other cores. Furthermore, we perform local, distributed arbitration according to the global TDM schedule. This solution avoids a central arbiter and scales to a large number of processors

A Time-Predictable Memory Network-on-Chip

To derive safe bounds on worst-case execution times (WCETs), all components of a computer system need to be time-predictable: the processor pipeline, the caches, the memory controller, and memory arbitration on a multicore processor. This paper presents a solution for time-predictable memory arbitration and access for chip-multiprocessors. The memory network-on-chip is organized as a tree with time-division multiplexing (TDM) of accesses to the shared memory. The TDM based arbitration completely decouples processor cores and allows WCET analysis of the memory accesses on individual cores without considering the tasks on the other cores. Furthermore, we perform local, distributed arbitration according to the global TDM schedule. This solution avoids a central arbiter and scales to a large number of processors

MultiPARTES: Multicore virtualization for Mixed-criticality Systems

Abstract-Modern embedded applications typically integrate a multitude of functionalities with potentially different criticality levels into a single system. Without appropriate preconditions, the integration of mixed-criticality subsystems can lead to a significant and potentially unacceptable increase of engineering and certification costs. A promising solution is to incorporate mechanisms that establish multiple partitions with strict temporal and spatial separation between the individual partitions. In this approach, subsystems with different levels of criticality can be placed in different partitions and can be verified and validated in isolation. The MultiPARTES FP7 project aims at supporting mixedcriticality integration for embedded systems based on virtualization techniques for heterogeneous multicore processors. A major outcome of the project is the MultiPARTES XtratuM, an open source hypervisor designed as a generic virtualization layer for heterogeneous multicore. MultiPARTES evaluates the developed technology through selected use cases from the offshore wind power, space, visual surveillance, and automotive domains. The impact of MultiPARTES on the targeted domains will be also discussed. In a number of ongoing research initiatives (e.g., RECOMP, ARAMIS, MultiPARTES, CERTAINTY) mixed-criticality integration is considered in multicore processors. Key challenges are the combination of software virtualization and hardware segregation and the extension of partitioning mechanisms to jointly address significant non-functional requirements (e.g., time, energy and power budgets, adaptivity, reliability, safety, security, volume, weight, etc.) along with development and certification methodology

Real-Time and Energy-Efficient Routing for Industrial Wireless Sensor-Actuator Networks

With the emergence of industrial standards such as WirelessHART, process industries are adopting Wireless Sensor-Actuator Networks (WSANs) that enable sensors and actuators to communicate through low-power wireless mesh networks. Industrial monitoring and control applications require real-time communication among sensors, controllers and actuators within end-to-end deadlines. Deadline misses may lead to production inefficiency, equipment destruction to irreparable financial and environmental impacts. Moreover, due to the large geographic area and harsh conditions of many industrial plants, it is labor-intensive or dan- gerous to change batteries of field devices. It is therefore important to achieve long network lifetime with battery-powered devices. This dissertation tackles these challenges and make a series of contributions. (1) We present a new end-to-end delay analysis for feedback control loops whose transmissions are scheduled based on the Earliest Deadline First policy. (2) We propose a new real-time routing algorithm that increases the real-time capacity of WSANs by exploiting the insights of the delay analysis. (3) We develop an energy-efficient routing algorithm to improve the network lifetime while maintaining path diversity for reliable communication. (4) Finally, we design a distributed game-theoretic algorithm to allocate sensing applications with near-optimal quality of sensing

Latency analysis for data chains of real-time periodic tasks

International audienceA data chain is a sequence of periodic real-time communicating tasks that are processing the data from sensors up to actuators. It determines an order in which the tasks propagate data but not in which they are executed: inter-task communication and scheduling are independent. In this paper, we focus on the latency computation, considered as the time elapsed from getting the data from an input and processing it to an output of a data chain. We propose a method for the worst-case latency calculation of periodic tasks’ data chains executed by a partitioned fixed-priority preemptive scheduler upon a multiprocessor platform. As far as we know, there is no such formal approach based on closed-form expression for communicating real-time tasks

Scheduling Real-time Divisible Loads in Cluster Computing Environment

The significance of cluster computing in solving massively parallel workloads is tremendous. Divisible Load Theory has proven to be very successful in optimizing the usage of the system resources by partitioning the arbitrarily divisible loads adequately among the cluster nodes. Arbitrarily divisible loads have significant real-world applications in high energy and particle physics. In this thesis, various algorithms for a cluster computing environment are studied including the ones dealing with divisible load theory confirming DLT based algorithms performing better in most cases. The loads that are considered in this thesis are hard real-time tasks with associated deadlines. Specifically, a comparison is made between clusters with one where the head node doesn't participate in processing of the work-loads with the other where the head node does participate in processing of the work-loads. A new mathematical formula is derived for the task execution time corresponding to the new scenario of head node possessing front-end processing capability. The existing algorithms corresponding to Real-Time Divisible Load Theory are then implemented using this new formula to examine the scheduling performance in this new scenario compared to the conventional scenario where the head node lacks front-end processing capability