207 research outputs found
Online Correction of Dispersion Error in 2D Waveguide Meshes
An elastic ideal 2D propagation medium, i.e., a membrane, can be simulated by
models discretizing the wave equation on the time-space grid (finite difference
methods), or locally discretizing the solution of the wave equation (waveguide
meshes). The two approaches provide equivalent computational structures, and
introduce numerical dispersion that induces a misalignment of the modes from
their theoretical positions. Prior literature shows that dispersion can be
arbitrarily reduced by oversizing and oversampling the mesh, or by adpting
offline warping techniques. In this paper we propose to reduce numerical
dispersion by embedding warping elements, i.e., properly tuned allpass filters,
in the structure. The resulting model exhibits a significant reduction in
dispersion, and requires less computational resources than a regular mesh
structure having comparable accuracy.Comment: 4 pages, 5 figures, to appear in the Proceedings of the International
Computer Music Conference, 2000. Corrected first referenc
Realization of Low-Voltage Modified CBTA and Design of Cascadable Current-Mode All-Pass Filter
In this paper, a low voltage modified current backward transconductance amplifier (MCBTA) and a novel first-order current-mode (CM) all-pass filter are presented. The MCBTA can operate with ±0.9 V supply voltage and the total power consumption of MCBTA is 1.27 mW. The presented all-pass filter employs single MCBTA, a grounded resistor and a grounded capacitor. The circuit possesses low input and high output impedances which make it ideal for current-mode systems. The presented all-pass filter circuit can be made electronically tunable due to the bias current of the MCBTA. Non-ideal study along with simulation results are given for validation purpose. Further, an nth-order cascadable all-pass filter is also presented. It uses n MCBTAs, n grounded resistors and n grounded capacitors. The performance of the proposed circuits is demonstrated by using PSPICE simulations based on the 0.18 ”m TSMC level-7 CMOS technology parameters
Development and Analysis of Non-Delay-Line Constant-Fraction Discriminator Timing Circuits, Including a Fully-Monolithic CMOS Implementation
A constant-fraction discriminator (CFD) is a time pick-off circuit providing time derivation that is insensitive to input-signal amplitude and, in some cases, input-signal rise time. CFD time pick-off circuits are useful in Positron Emission Tomography (PET) systems where Bismuth Germanate (BGO)/photomultiplier scintillation detectors detect coincident, 511-keV annihilation gamma rays.
Time walk and noise-induced timing jitter in time pick-off circuits are discussed along with optimal and sub-optimal timing filters designed to minimize timing jitter. Additionally, the effects of scintillation-detector statistics on timing performance are discussed, and Monte Carlo analysis is developed to provide estimated timing and energy spectra for selected detector and time pick-off circuit configurations. The traditional delay-line CFD is then described with a discussion of deterministic (non statistical) performance and statistical Monte Carlo timing performance. A new class of non-delay-line CFD circuits utilizing lowpass- and/or allpass-filter delay-line approximations is then presented. The timing performance of these non-delay-line CFD circuits is shown to be comparable to traditional delay-line CFD circuits.
Following the development and analysis of non-delay-line CFD circuits, a fully-monolithic, non-delay-line CFD circuit is presented which was fabricated in a standard digital, 2-Ό, double-meta], double-poly, n-well CMOS process. The CMOS circuits developed include a low time walk comparator having a time walk of approximately 175 ps for input signals with amplitudes between 10-mV to 2000-mV and a rise time (10 - 90%) of 10 ns. Additionally, a fifth-order, continuous-time filter having a bandwidth of over 100 MHz was developed to provide CFD signal shaping without a delay line. The measured timing resolution (3.26 ns FWITh1, 6.50 ns FWTM) of the fully-monolithic, CMOS CFD is comparable to measured resolution (3.30 ns FWHM, 6.40 ns FWTM) of a commercial, discrete, bipolar CFD containing an external delay line. Each CFD was tested with a PET EGO/photomultiplier scintillation detector and a preamplifier having a 10-ns (10 - 90%) rise-time. The development of a fully-monolithic, CMOS CFD circuit, believed to be the first such reported development, is significant for PET and other systems that employ many front-end CFD time pick-off circuits
High Input Impedance Voltage-Mode Biquad Filter Using VD-DIBAs
This paper deals with a single-input multiple-output biquadratic filter providing three functions (low-pass, high-pass and band-pass) based on voltage differencing differential input buffered amplifier (VD-DIBA). The quality factor and pole frequency can be electronically tuned via the bias current. The proposed circuit uses two VD-DIBAs and two grounded capacitors without any external resistors, which is suitable to further develop into an integrated circuit. Moreover, the circuit possesses high input impedance, providing easy voltage-mode cascading. It is shown that the filter structure can be easily extended to multi-input filter without any additional components, providing also all-pass and band-reject properties. The PSPICE simulation and experimental results are included, verifying the key characteristics of the proposed filter. The given results agree well with the theoretical presumptions
Design of adaptive analog filters for magnetic front-end read channels
Esta tese estuda o projecto e o comportamento de filtros em tempo contĂnuo de
muito-alta-frequĂȘncia. A motivação deste trabalho foi a investigação de soluçÔes de filtragem
para canais de leitura em sistemas de gravação e reprodução de dados em suporte
magnético, com custos e consumo (tamanho total inferior a 1 mm2 e consumo inferior a
1mW/polo), inferiores aos circuitos existentes. Nesse sentido, tal como foi feito neste
trabalho, o råpido desenvolvimento das tecnologias de microelectrónica suscitou esforços
muito significativos a nĂvel mundial com o objectivo de se investigarem novas tĂ©cnicas
de realização de filtros em circuito integrado monolĂtico, especialmente em tecnologia
CMOS (Complementary Metal Oxide Semiconductor). Apresenta-se um estudo comparativo
a diversos nĂveis hierĂĄrquicos do projecto, que conduziu Ă realização e caracterização
de soluçÔes com as caracterĂsticas desejadas.
Num primeiro nĂvel, este estudo aborda a questĂŁo conceptual da gravação e transmissĂŁo
de sinal bem como a escolha de bons modelos matemĂĄticos para o tratamento da
informação e a minimização de erro inerente Ă s aproximaçÔes na conformidade aos princĂpios
fĂsicos dos dispositivos caracterizados.
O trabalho principal da tese Ă© focado nos nĂveis hierĂĄrquicos da arquitectura do
canal de leitura e da realização em circuito integrado do seu bloco principal â o bloco de
filtragem. Ao nĂvel da arquitectura do canal de leitura, apresenta-se um estudo alargado
sobre as metodologias existentes de adaptação de sinal e recuperação de dados em suporte
magnĂ©tico. Este desĂgnio aparece no Ăąmbito da proposta de uma solução de baixo custo,
baixo consumo, baixa tensão de alimentação e baixa complexidade, alicerçada em tecnologia
digital CMOS, para a realização de um sistema DFE (Decision Feedback Equalization)
com base na igualização de sinal utilizando filtros integrados analógicos em tempo
contĂnuo.
Ao nĂvel do projecto de realização do bloco de filtragem e das tĂ©cnicas de implementação
de filtros e dos seus blocos constituintes em circuito integrado, concluiu-se que
a técnica baseada em circuitos de transcondutùncia e condensadores, também conhecida como filtros gm-C (ou transcondutùncia-C), é a mais adequada para a realização de filtros
adaptativos em muito-alta-frequĂȘncia. Definiram-se neste nĂvel hierĂĄrquico mais baixo,
dois subnĂveis de aprofundamento do estudo no Ăąmbito desta tese, nomeadamente: a pesquisa
e anålise de estruturas ideais no projecto de filtros recorrendo a representaçÔes no
espaço de estados; e, o estudo de técnicas de realização em tecnologia digital CMOS de
circuitos de transcondutùncia para a implementação de filtros integrados analógicos em
tempo contĂnuo.
Na sequĂȘncia deste estudo, apresentam-se e comparam-se duas estruturas de filtros
no espaço de estados, correspondentes a duas soluçÔes alternativas para a realização de
um igualador adaptativo realizado por um filtro contĂnuo passa-tudo de terceira ordem,
para utilização num canal de leitura de dados em suporte magnético.
Como parte constituinte destes filtros, apresenta-se uma técnica de realização de
circuitos de transcondutùncia, e de realização de condensadores lineares usando matrizes
de transĂstores MOSFET para processamento de sinal em muito-alta-frequĂȘncia realizada
em circuito integrado usando tecnologia digital CMOS submicrométrica. Apresentam-se
métodos de adaptação automåtica capazes de compensar os erros face aos valores nominais
dos componentes, devidos Ă s tolerĂąncias inerentes ao processo de fabrico, para os
quais apresentamos os resultados de simulação e de medição experimental obtidos.
Na sequĂȘncia deste estudo, resultou igualmente a apresentação de um circuito passĂvel
de constituir uma solução para o controlo de posicionamento da cabeça de leitura
em sistemas de gravação/reprodução de dados em suporte magnético. O bloco proposto
Ă© um filtro adaptativo de primeira ordem, com base nos mesmos circuitos de transcondutĂąncia
e técnicas de igualação propostos e utilizados na implementação do filtro adaptativo
de igualação do canal de leitura.
Este bloco de filtragem foi projectado e incluĂdo num circuito integrado (Jaguar) de
controlo de posicionamento da cabeça de leitura realizado para a empresa ATMEL em
Colorado Springs, e incluĂdo num produto comercial em parceria com uma empresa escocesa
utilizado em discos rĂgidos amovĂveis.This thesis studies the design and behavior of continuous-time very-high-frequency
filters. The motivation of this work was the search for filtering solutions for the readchannel
in recording and reproduction of data on magnetic media systems, with costs and
consumption (total size less than 1 mm2 and consumption under 1mW/pole), lower than
the available circuits. Accordingly, as was done in this work, the rapid development of
microelectronics technology raised very significant efforts worldwide in order to investigate
new techniques for implementing such filters in monolithic integrated circuit, especially
in CMOS technology (Complementary Metal Oxide Semiconductor). We present
a comparative study on different hierarchical levels of the project, which led to the realization
and characterization of solutions with the desired characteristics.
In the first level, this study addresses the conceptual question of recording and
transmission of signal and the choice of good mathematical models for the processing of
information and minimization of error inherent in the approaches and in accordance with
the principles of the characterized physical devices.
The main work of this thesis is focused on the hierarchical levels of the architecture
of the read channel and the integrated circuit implementation of its main block - the filtering
block. At the architecture level of the read channel this work presents a comprehensive
study on existing methodologies of adaptation and signal recovery of data on
magnetic media. This project appears in the sequence of the proposed solution for a lowcost,
low consumption, low voltage, low complexity, using CMOS digital technology for
the performance of a DFE (Decision Feedback Equalization) based on the equalization of
the signal using integrated analog filters in continuous time.
At the project level of implementation of the filtering block and techniques for implementing
filters and its building components, it was concluded that the technique based
on transconductance circuits and capacitors, also known as gm-C filters is the most appropriate
for the implementation of very-high-frequency adaptive filters. We defined in
this lower level, two sub-levels of depth study for this thesis, namely: research and analysis
of optimal structures for the design of state-space filters, and the study of techniques for the design of transconductance cells in digital CMOS circuits for the implementation
of continuous time integrated analog filters.
Following this study, we present and compare two filtering structures operating in
the space of states, corresponding to two alternatives for achieving a realization of an
adaptive equalizer by the use of a continuous-time third order allpass filter, as part of a
read-channel for magnetic media devices.
As a constituent part of these filters, we present a technique for the realization of
transconductance circuits and for the implementation of linear capacitors using arrays of
MOSFET transistors for signal processing in very-high-frequency integrated circuits using
sub-micrometric CMOS technology. We present methods capable of automatic adjustment
and compensation for deviation errors in respect to the nominal values of the
components inherent to the tolerances of the fabrication process, for which we present
the simulation and experimental measurement results obtained.
Also as a result of this study, is the presentation of a circuit that provides a solution
for the control of the head positioning on recording/playback systems of data on magnetic
media. The proposed block is an adaptive first-order filter, based on the same transconductance
circuits and equalization techniques proposed and used in the implementation
of the adaptive filter for the equalization of the read channel.
This filter was designed and included in an integrated circuit (Jaguar) used to control
the positioning of the read-head done for ATMEL company in Colorado Springs, and
part of a commercial product used in removable hard drives fabricated in partnership with a Scottish company
WISE: Warped impulse structure estimation for time-domain linear macromodeling
published_or_final_versio
The voltage-mode first order universal filter using single voltage differencing differential input buffered amplifier with electronic controllability
In this research contribution, the electronically tunable first-order universal filter employing a single voltage differencing differential input buffered amplifier (VD-DIBA) (constructed from two commercially available integrated circuit (IC): the operational transconductance amplifier, IC number LT1228, and the differential voltage input buffer, IC number AD830), one capacitor and two resistors. The features of the designed first order universal filter are as follows. Three voltage-mode first-order functions, low-pass (LP), all-pass (AP) and high-pass (HP) responses are given. The natural frequency (0) of the presented configuration can be electronically adjusted by setting the DC bias current. Moreover, the voltage gain of the LP and HP filters can be controllable. The phase responses of an AP configuration can be varied from 00 to â1800 and 1800 to 00. The power supply voltages were set at ±5 . Verification of the theoretically described performances of the introduced electronically tunable universal filter was proved by the PSpice simulation and experiment
Digital Filters
The new technology advances provide that a great number of system signals can be easily measured with a low cost. The main problem is that usually only a fraction of the signal is useful for different purposes, for example maintenance, DVD-recorders, computers, electric/electronic circuits, econometric, optimization, etc. Digital filters are the most versatile, practical and effective methods for extracting the information necessary from the signal. They can be dynamic, so they can be automatically or manually adjusted to the external and internal conditions. Presented in this book are the most advanced digital filters including different case studies and the most relevant literature
Log-domain All-pass Filter-based Multiphase Sinusoidal Oscillators
Log-domain current-mode multiphase sinusoidal oscillators based on all-pass filters are presented in this paper. The first-order differential equation is used for obtaining inverting and non-inverting all-pass filters. The proposed oscillators are realized by all-pass filters which can be electronically tuned their natural frequency and stage gain by adjusting the bias currents. Each all pass filter contains 10 NPN transistors and a grounded capacitor. The validated BJT model which used in SPICE simulation operated by a single power supply as low as 2.5 V. The frequency of oscillation can be controlled over four decades. The total harmonic distortions of these MSO at frequency 56.67 MHz and 54.44 MHz, obtained around 0.52% and 0.75%, respectively. The proposed circuits enable fully integrated in telecommunication systems and also suit to high-frequency applications. Nonideality studies and PSpice simulation results are included to confirm the theory
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