Teramac–configurable custom computing

can execute synchronous logic designs of up to one million gates at rates up to l megahertz. A fully configured Teramac includes half a gigabyte of RAM and hardware support for large multiported register files. The system has been built from custom FPGA's packaged in large multichip modules (MCMs). A large custom circuit (-1,000,000 gates) may be compiled onto the hardware in approximately 2 hours, without user intervention. The system is being used to explore the potential of custom computing machinery (CCM). 1 Teramac System Overview Research on special purpose parallel architectures and custom computing is very much an experimental science dependent on the existence of prototypes. We have built an FPGA-based configurable custom computing engine to enable experiments on an interesting scale. Teramac is a configurable hardware system comprising 1728 custom FPGAs and.5 gigabytes of RAM. It features: 1,000,000 gate capacity for synchronous logic circuits. up to 1 MHz clock rate..5 Gbytes of memory organized into 64 independent, 32-bit-wide banks, each with independent read and write ports. Banks may be combined horizontally and vertically to form large memories. Fully automatic compilation. Checkpoint restart capability. Scalability. A minimum Teramac system (a single board) supports designs of up to 64K gates. Additional boards may be added to expand the capacity incrementally, up to maximum of 16 boards. We are currently conducting experiments with an 8 board Teramac system.

The Teramac custom computer: Extending the limits with defect tolerance

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Cube-4 Implementations on the Teramac Custom Computing Machine

We present two implementations of the Cube-4 volume rendering architecture on the Teramac custom computing machine. Cube-4 uses a slice­ parallel ray-casting algorithm that allows for a paral­ lel and pipelined implementation of ray-casting with tri-linear interpolation and surface normal estimation from interpolated samples. Shading, classification and compositing are part of rendering pipeline. With the partitioning schemes introduced in this paper, Cube-4 is capable of rendering large datasets with a limited number of pipelines. The Teramac hardware simulator at the Hewlett-Packard research laboratories, Palo Alto, CA, on which Cube-4 was implemented, belongs to the new class of custom computing machines. Teramac combines the speed of special-purpose hardware with the flexibility of general-purpose computel's. With Teramac as a development tool we were able to implement in just five weeks working Cube-4 prototypes, capable of rendering for example datasets of 1283 voxels in 0.65 seconds at 0,96 MHz processing frequency. The performance results from these implementations indicate real-time performance for high-resolution data-sets.Eurographics Workshop on Graphics Hardwar