UAV Path Planning in Search Operations

QC 2011120

Fast Freenet: Improving Freenet Performance by Preferential Partition Routing and File Mesh Propagation

The Freenet Peer-to-Peer network is doing a good job in providing anonymity to the users. But the performance of the network in terms of download speed and request hit ratio is not that good. We propose two modifications to Freenet in order to improve the download speed and request hit ratio for all participants. To improve download speed we propose Preferential Partition Routing, where nodes are grouped according to bandwidth and slow nodes are discriminated when routing. For improvements in request hit ratio we propose File Mesh propagation where each node sends fuzzy information about what documents it posesses to its neigbors. To verify our proposals we simulate the Freenet network and the bandwidth restrictions present between nodes as well as using observed distributions for user actions to show how it affects the network. Our results show an improvement of the request hit ratio by over 30 times and an increase of the average download speed with six times, compared to regular Freenet routing

A comparison of CMB- and HLA-based approaches to type I interoperability reference model problems for COTS-based distributed simulation

Commercial-off-the-shelf (COTS) simulation packages (CSPs) are software used by many simulation modellers to build and experiment with models of various systems in domains such as manufacturing, health, logistics and commerce. COTS distributed simulation deals with the interoperation of CSPs and their models. Such interoperability has been classified into six interoperability reference models. As part of an on-going standardisation effort, this paper introduces the COTS Simulation Package Emulator, a proposed benchmark that can be used to investigate Type I interoperability problems in COTS distributed simulation. To demonstrate its use, two approaches to this form of interoperability are discussed, an implementation of the CMB conservative algorithm, an example of a so-called “light” approach, and an implementation of the HLA TAR algorithm, an example of a so-called “heavy” approach. Results from experimentation over four federation topologies are presented and it is shown the HLA approach out performs the CMB approach in almost all cases. The paper concludes that the CSPE benchmark is a valid basis from which the most efficient approach to Type I interoperability problems for COTS distributed simulation can be discovered

Towards Parallel VHDL Simulation

In hardware design of today, there is a growing usage of hardware design languages to speed up the time-to-market. As the design complexity grows, so does the simulation time. To solve this problem, several research groups have suggested the use of parallel computers to speed up simulation. This report surveys some of the issues involved when designing a parallel simulator for one of the more popular hardware description languages, VHDL. The report includes a brief survey of VHDL itself, as well as a survey of simulation methodologies, especially parallel discrete event simulation. Some important issues when designing a parallel VHDL simulator are addressed and some parallel VHDL simulation projects and experiments that already have been initiated are described briefly. The report concludes with some general remarks on important research that needs to be done as well as suggesting a suitable approach for future research. Keywords: hardware description languages, VHDL, simul..

Modeling and Analysis of Multi-Access Mechanisms in SUPERLAN

Today, new multi-Gbps LANs are designed to support a wide range of applications generating isochronous and nonisochronous traffic at arbitrary bit rates. The growing demand for high bandwidth networking, under increasing performance constraints, has posed fundamental challenges to LAN design and implementation. Three fundamental bottlenecks exist in a multi-Gbps LAN environment that must be handled in order to achieve optimal performance. These are: opto-electronic bottleneck, service bottleneck, and processing bottleneck. A novel architectural solution is proposed to open up these bottlenecks. Total network throughput of about 20 Gbps is achievable. Performance modeling, analysis and evaluation is reported for a class of Medium Access Protocols (MAC) for isochronous traffic. The performance results show good and very good performance for this solution

Modeling and Analysis of Multi-Access Mechanisms in SUPERLAN

Today, new multi-Gbps LANs are designed to support a wide range of applications generating isochronous and nonisochronous traffic at arbitrary bit rates. The growing demand for high bandwidth networking, under increasing performance constraints, has posed fundamental challenges to LAN design and implementation. Three fundamental bottlenecks exist in a multi-Gbps LAN environment that must be handled in order to achieve optimal performance. These are: opto-electronic bottleneck, service bottleneck, and processing bottleneck. A novel architectural solution is proposed to open up these bottlenecks. Total network throughput of about 20 Gbps is achievable. Performance modeling, analysis and evaluation is reported for a class of Medium Access Protocols (MAC) for isochronous traffic. The performance results show good and very good performance for this solution

Towards Efficient Simulation of Parallel Architectures

During the recent years the study of new parallel architectures has intensified. The design of a new architecture entails the study of a variety of configuration parameters. During the design of an architecture it is expensive and non-flexible to build an actual prototype and thereof to evaluate the performance of a new architecture the most used method is simulation. This report provides an overview of the simulation techniques presently employed by several generalpurpose simulation environments for the simulation and evaluation of computer architectures. We address several issues which general architecture simulators consider in order to provide enough flexibility to specify and simulate a wide range of distributed architectures. In particular, we focus on a new emerging research field ¾ parallel simulation of parallel architectures. 1. Introduction The area of research of new parallel architectures has intensified during the recent years thanks to the development of cheap hardware..