20 research outputs found

    Four point probe structures with buried electrodes for the electrical characterization of ultrathin conducting films

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    Test structures for the electrical characterization of ultrathin conductive (ALD) films are presented based on buried electrodes on which the ultrathin film is deposited.\ud This work includes test structure design and fabrication, and the electrical characterization of ALD TiN films down to 4 nm. It is shown that these structures can be used successfully to characterize sub 10 nm films.\u

    On the leakage problem of MIM capacitors due to improper etching of titanium nitride

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    In this work, Metal-insulator-metal (MIM) capacitor structures are fabricated in a technology using TiN as electrode material. The electrical characterization revealed devices with small and large leakage currents. Scanning Electron Microscopy (SEM) inspection showed a correlation between high leakage currents and large roughness in the dielectric layer of the capacitor. Cross-section of leaky capacitors by means of a Focussed Ion Beam (FIB) showed a rough edge of the bottom electrode and the presence of particles leading to a rough dielectric layer. These artefacts are the result of improper wet chemical etching of the TiN layer. It is shown, high leakage currents and improper etching of the TiN layer are correlated

    Electrically active interface defects in the (100)Si/SiOx/HfO2/TiN system: Origin, instabilities and passivation

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    An analysis of the origin and passivation of interface states in (100)Si/SiOx/HfO2/TiN capacitor structures is presented. For high-k gate/metal gate capacitors which exhibit relatively high interface state densities (> 1x1011cm-2) the dominant interfacial defects are silicon dangling bond (Pbo) centres. For (100)Si/SiOx/HfO2/TiN capacitors which experience no high temperature thermal budget following HfO2/TiN gate formation (T<600{degree sign}C), the devices exhibit instabilities, where the interface state densities are modified during electrical measurements. The origin of this instability is studied. The response of the interface state density to rapid thermal annealing (30s) in N2 over the temperature range 600-900{degree sign}C is presented. In addition, results are presented for interface state passivation in forming gas (0.5H2/0.95N2) from 350-550{degree sign}C for (100)Si/SiOx/HfO2/TiN gate stacks with no post deposition annealing following TiN gate formation and for devices following a 900{degree sign}C, 30s N2 RTA

    Contact chain measurements for ultrathin conducting films

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    Test structures for the electrical characterization of ultrathin conductive (ALD) films are presented based on electrodes on which the ultrathin film is deposited. The contact resistance of the buried electrodes to the ultrathin ALD TiN films is investigated using contact chain structures. This work includes test structure design and fabrication, and the electrical characterization of ALD TiN films down to 4 nm in thickness. It is shown that contact chain structures with buried electrodes can be used successfully to characterize the contact resistance to sub 10 nm ALD TiN film

    Four point probe structures with buried and surface electrodes for the electrical characterization of ultrathin conducting films

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    Test structures for the electrical characterization of ultrathin conductive films are presented based on electrodes on which the ultrathin film is deposited. Two different designs are discussed: a novel design with buried electrodes and a conventional design with electrodes at the surface. This work includes test structure design and fabrication, and the electrical characterization of ALD TiN films down to 4 nm. We demonstrate that the novel test structures provide the same results as the conventional structures, and have the advantage of broader materials choice (i.e. conductor-dielectric combination). The proposed structures can be used successfully to characterize sub 10 nm films

    Electrical properties of low pressure chemical vapor deposited silicon nitride thin films for temperatures up to 650 °C

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    The results of a study on electrical conduction in low pressure chemical vapor deposited silicon nitride thin films for temperatures up to 650 °C are described. Current density versus electrical field characteristics are measured as a function of temperature for 100 and 200 nm thick stoichiometric (Si3N4) and low stress silicon-rich (SiRN) films. For high E-fields and temperatures up to 500 °C conduction through Si3N4 can be described well by Frenkel–Poole transport with a barrier height of ∼ 1.10 eV, whereas for SiRN films Frenkel–Poole conduction prevails up to 350 °C with a barrier height of ∼ 0.92 eV. For higher temperatures, dielectric breakdown of the Si3N4 and SiRN films occurred before the E-field was reached above which Frenkel–Poole conduction dominates. A design graph is given that describes the maximum E-field that can be applied over silicon nitride films at high temperatures before electrical breakdown occurs

    Simulation of a Nanolink Hot-Plate Device

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    In this work, a miniaturized hotplate device with a low power consumption of a few milliwatts and a CMOS compatible fabrication process is proposed and analyzed. This micro hotplate is based on a nanoscopic conductive link (Ø 10- 100 nm) created between two electrodes separated by a SiO2 layer and can be used as chemical sensor and actuator. A typical foreseen application is a gas sensor (i.e. Pellistor) for hydrocarbons (butane, methane, propane, etc.) based on temperature changes due to the catalytic combustion of hydrocarbons. In this paper, simulation results are presented showing the electrical and thermal properties of these newly designed nanoscopic–link based devices. \ud Index Terms— Hot Surface, Chemical Sensor, Chemical Actuator, Pellistor, Microreactor\u

    Stability of thin platinum films implemented in high-temperature microdevices

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    In this paper we report on structural and electrical properties of thin films of Pt with Ti, Ta, or no adhesion, which were annealed in different ambient at temperatures in the range 400–950 ◦C. Correlations are made between the mechanical strain and grain size values obtained from X-ray diffraction, electrical measurements, and optical microscope images of film sintering after annealing at high temperature. A method to obtain highly adhesive, patterned Pt films without adhesion layer is presented, which films show the highest reliability, in terms of structural integrity and electrical properties. Therefore this is the best option for implementation in high-temperature microdevices like microreactors and gas sensors operating at temperatures above 750 ◦C

    A Difference in Using Atomic Layer Deposition or Physical Vapour Deposition TiN as Electrode Material in Metal-Insulator-Metal and Metal-Insulator-Silicon Capacitors

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    In this work, metal-insulator-metal (MIM) and metal-insulator-silicon (MIS) capacitors are studied using titanium nitride (TiN) as the electrode material. The effect of structural defects on the electrical properties on MIS and MIM capacitors is studied for various electrode configurations. In the MIM capacitors the bottom electrode is a patterned 100 nm TiN layer (called BE type 1), deposited via sputtering, while MIS capacitors have a flat bottom electrode (called BE type 2–silicon substrate). A high quality 50–100 nm thick SiO2 layer, made by inductively-coupled plasma CVD at 150 _C, is deposited as a dielectric on top of both types of bottom electrodes. BE type 1 (MIM) capacitors have a varying from low to high concentration of structural defects in the SiO2 layer. BE type 2 (MIS) capacitors have a low concentration of structural defects and are used as a reference. Two sets of each capacitor design are fabricated with the TiN top electrode deposited either via physical vapour deposition (PVD, i.e., sputtering) or atomic layer deposition (ALD). The MIM and MIS capacitors are electrically characterized in terms of the leakage current at an electric field of 0.1 MV/cm (Ileak_ and for different structural defect concentrations. It is shown that the structural defects only show up in the electrical characteristics of BE type 1 capacitors with an ALD TiN-based top electrode. This is due to the excellent step coverage of the ALD process. This work clearly demonstrates the sensitivity to process-induced structural defects, when ALD is used as a step in process integration of conductors on insulation materials

    Characterisation and passivation of interface defects in (1 0 0)/Si/SiO2/HfO2/TiN gate stacks

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    The density and energy distribution of electrically active interface defects in the (100)Si/SiO2/HfO2 system are presented. Experimental results are analysed for HfO2 thin films deposited by atomic layer deposition and metal-organic chemical vapour deposition on (100)Si substrates.\ud The paper discusses the origin of the interface states, and their passivation in hydrogen over the temperature range 350–550 C.\u
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