Characterization of irradiated RD53A pixel modules with passive CMOS sensors

We are investigating the feasibility of using CMOS foundries to fabricate silicon detectors, both for pixels and for large-area strip sensors. The availability of multi-layer routing will provide the freedom to optimize the sensor geometry and the performance, with biasing structures in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test-structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150$\,$nm CMOS process. This paper will focus on the characterization of irradiated and non-irradiated pixel modules, composed by a CMOS passive sensor interconnected to a RD53A chip. The sensors are designed with a pixel cell of $25\times100\,\mu \mathrm{m}^2$ in case of DC coupled devices and $50\times50\,\mu \mathrm{m}^2$ for the AC coupled ones. Their performance in terms of charge collection, position resolution, and hit efficiency was studied with measurements performed in the laboratory and with beam tests. The RD53A modules with LFoundry silicon sensors were irradiated to fluences up to $1.0\times10^{16}\,\frac{\mathrm{n}_\mathrm{eq}}{\mathrm{cm}^2}$

Test beam performance of a CBC3-based mini-module for the Phase-2 CMS Outer Tracker before and after neutron irradiation

The Large Hadron Collider (LHC) at CERN will undergo major upgrades to increase the instantaneous luminosity up to 5–7.5×10$^{34}$ cm$^{-2}$s$^{-1}$. This High Luminosity upgrade of the LHC (HL-LHC) will deliver a total of 3000–4000 fb-1 of proton-proton collisions at a center-of-mass energy of 13–14 TeV. To cope with these challenging environmental conditions, the strip tracker of the CMS experiment will be upgraded using modules with two closely-spaced silicon sensors to provide information to include tracking in the Level-1 trigger selection. This paper describes the performance, in a test beam experiment, of the first prototype module based on the final version of the CMS Binary Chip front-end ASIC before and after the module was irradiated with neutrons. Results demonstrate that the prototype module satisfies the requirements, providing efficient tracking information, after being irradiated with a total fluence comparable to the one expected through the lifetime of the experiment

Selection of the silicon sensor thickness for the Phase-2 upgrade of the CMS Outer Tracker

During the operation of the CMS experiment at the High-Luminosity LHC the silicon sensors of the Phase-2 Outer Tracker will be exposed to radiation levels that could potentially deteriorate their performance. Previous studies had determined that planar float zone silicon with n-doped strips on a p-doped substrate was preferred over p-doped strips on an n-doped substrate. The last step in evaluating the optimal design for the mass production of about 200 m$^{2}$ of silicon sensors was to compare sensors of baseline thickness (about 300 μm) to thinned sensors (about 240 μm), which promised several benefits at high radiation levels because of the higher electric fields at the same bias voltage. This study provides a direct comparison of these two thicknesses in terms of sensor characteristics as well as charge collection and hit efficiency for fluences up to 1.5 × 10$^{15}$ n$_{eq}$/cm$^{2}$. The measurement results demonstrate that sensors with about 300 μm thickness will ensure excellent tracking performance even at the highest considered fluence levels expected for the Phase-2 Outer Tracker

Beam test performance of a prototype module with Short Strip ASICs for the CMS HL-LHC tracker upgrade

The Short Strip ASIC (SSA) is one of the four front-end chips designed for the upgrade of the CMS Outer Tracker for the High Luminosity LHC. Together with the Macro-Pixel ASIC (MPA) it will instrument modules containing a strip and a macro-pixel sensor stacked on top of each other. The SSA provides both full readout of the strip hit information when triggered, and, together with the MPA, correlated clusters called stubs from the two sensors for use by the CMS Level-1 (L1) trigger system. Results from the first prototype module consisting of a sensor and two SSA chips are presented. The prototype module has been characterized at the Fermilab Test Beam Facility using a 120 GeV proton beam

Comparative evaluation of analogue front-end designs for the CMS Inner Tracker at the High Luminosity LHC

The CMS Inner Tracker, made of silicon pixel modules, will be entirely replaced prior to the start of the High Luminosity LHC period. One of the crucial components of the new Inner Tracker system is the readout chip, being developed by the RD53 Collaboration, and in particular its analogue front-end, which receives the signal from the sensor and digitizes it. Three different analogue front-ends (Synchronous, Linear, and Differential) were designed and implemented in the RD53A demonstrator chip. A dedicated evaluation program was carried out to select the most suitable design to build a radiation tolerant pixel detector able to sustain high particle rates with high efficiency and a small fraction of spurious pixel hits. The test results showed that all three analogue front-ends presented strong points, but also limitations. The Differential front-end demonstrated very low noise, but the threshold tuning became problematic after irradiation. Moreover, a saturation in the preamplifier feedback loop affected the return of the signal to baseline and thus increased the dead time. The Synchronous front-end showed very good timing performance, but also higher noise. For the Linear front-end all of the parameters were within specification, although this design had the largest time walk. This limitation was addressed and mitigated in an improved design. The analysis of the advantages and disadvantages of the three front-ends in the context of the CMS Inner Tracker operation requirements led to the selection of the improved design Linear front-end for integration in the final CMS readout chip

Portable Acceleration of CMS Computing Workflows with Coprocessors as a Service

Computing demands for large scientific experiments, such as the CMS experiment at the CERN LHC, will increase dramatically in the next decades. To complement the future performance increases of software running on central processing units (CPUs), explorations of coprocessor usage in data processing hold great potential and interest. Coprocessors are a class of computer processors that supplement CPUs, often improving the execution of certain functions due to architectural design choices. We explore the approach of Services for Optimized Network Inference on Coprocessors (SONIC) and study the deployment of this as-a-service approach in large-scale data processing. In the studies, we take a data processing workflow of the CMS experiment and run the main workflow on CPUs, while offloading several machine learning (ML) inference tasks onto either remote or local coprocessors, specifically graphics processing units (GPUs). With experiments performed at Google Cloud, the Purdue Tier-2 computing center, and combinations of the two, we demonstrate the acceleration of these ML algorithms individually on coprocessors and the corresponding throughput improvement for the entire workflow. This approach can be easily generalized to different types of coprocessors and deployed on local CPUs without decreasing the throughput performance. We emphasize that the SONIC approach enables high coprocessor usage and enables the portability to run workflows on different types of coprocessors

Performance of the CMS high-level trigger during LHC Run 2

The CERN LHC provided proton and heavy ion collisions during its Run 2 operation period from 2015 to 2018. Proton-proton collisions reached a peak instantaneous luminosity of 2.1 × 1034 cm−2s−1, twice the initial design value, at √ = 13 TeV . The CMS experiment records a subset of the collisions for further processing as part of its online selection of data for physics analyses, using a two-level trigger system: the Level-1 trigger, implemented in custom-designed electronics, and the high-level trigger, a streamlined version of the offline reconstruction software running on a large computer farm. This paper presents the performance of the CMS high-level trigger system during LHC Run 2 for physics objects, such as leptons, jets, and missing transverse momentum, which meet the broad needs of the CMS physics program and the challenge of the evolving LHC and detector conditions. Sophisticated algorithms that were originally used in offline reconstruction were deployed online. Highlights include a machine-learning b tagging algorithm and a reconstruction algorithm for tau leptons that decay hadronically