Bulk-CMOS Technology With High- Above-IC Inductors


amplifier (LNA) has been designed and implemented by 45 nm planar bulk-CMOS technology with high- above-IC inductors. In the designed LNA, the structure of a one-stage cascode amplifier with source inductive degeneration is used. All high- above-IC inductors have been implemented by thin-film wafer-level pack-aging technology. The fabricated LNA has a good linearity where the input 1 dB compression point is and the input referred third-order intercept point is It is operated with a 1 V power supply drawing a current of only 3.6 mA. The fabricated LNA has demonstrated a 4 dB noise figure and a 7.1 dB gain at the peak gain frequency of 23 GHz, and it has the highest figure-of-merit. The experimental results have proved the suitability of 45 nm gate length bulk-CMOS devices for RF ICs above 20 GHz. Index Terms—CMOS, electrostatic discharge (ESD) protection, 45 nm, K-band, low-noise amplifier (LNA). I

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