A design-for-test structure for optimising analogue and mixed signal IC test

Abstract

A new Design-for-Test (DfT) structure based on a configurable operational amplifier, referred to as a “swap amp” is presented that allows access to embedded analogue blocks. The structure has minimal impact on circuit performance and has been evaluated on a custom designed Phase Locked Loop (PLL) structure. A test chip containing faulty and fault free versions of this PLL structure, with and without DfT modifications, has been fabricated and an evaluation of this DfT scheme based on the swap-amp structure carried out. It is shown that for embedded analogue blocks, the DfT strategy can not only improve and simplify analogue and mixed signal IC test, but can also be used for diagnostics