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Low power RF CMOS phase-shifting dual modulus (16/17) prescaler

By Abhishek Duggal

Abstract

Due to the character of the original source materials and the nature of batch digitization, quality control issues may be present in this document. Please report any quality issues you encounter to digital@library.tamu.edu, referencing the URI of the item.Includes bibliographical references (leaf 50).Issued also on microfiche from Lange Micrographics.This report describes the research work I undertook for my M.S. degree requirements. The conventional and phase-shifting architectures are compared. Problems with the phase-shifting architecture are analyzed and a new modified architecture is proposed to eliminate the problems. The components of the proposed prescaler system are analyzed, their circuit design is outlined and their simulation results are presented. A new modified design is proposed for the divide-by-two circuit and its performance is analyzed. The overall system implementation is described at the transistor level and its simulation results are presented. A layout in 0.5u CMOS AMI technology is presented and the important layout considerations are discussed

Topics: electrical engineering., Major electrical engineering.
Publisher: Texas A&M University
Year: 2000
OAI identifier: oai:oaktrust.library.tamu.edu:1969.1/ETD-TAMU-2000-THESIS-D835
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