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Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support

By POLETTI F, POGGIALI A, BERTOZZI D, BENINI L, MARCHAL P, LOGHI M and PONCINO M

Abstract

In today\u2019s multiprocessor SoCs (MPSoCs), parallel programming models are needed to fully exploit hardware capabilities and to achieve the 100 Gops/W energy efficiency target required for Ambient Intelligence Applications. However, mapping abstract programming models onto tightly power-constrained hardware architectures imposes overheads which might seriously compromise performance and energy efficiency. The objective of this work is to perform a comparative analysis of message passing versus shared memory as programming models for single-chip multiprocessor platforms. Our analysis is carried out from a hardware-software viewpoint: We carefully tune hardware architectures and software libraries for each programming model. We analyze representative application kernels from the multimedia domain, and identify application-level parameters that heavily influence performance and energy efficiency. Then, we formulate guidelines for the selection of the most appropriate programming model and its architectural support

Publisher: 'Institute of Electrical and Electronics Engineers (IEEE)'
Year: 2007
DOI identifier: 10.1109/TC.2007.1040
OAI identifier: oai:air.uniud.it:11390/877622
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