Reconfigurable Multiplier Blocks (ReMB) offer significant area, delay and possibly power reduction in time multiplexed\ud implementation of multiple constant multiplications. This paper and its companion paper (subtitled Part II- Algorithm) together present a systematic synthesis\ud method for Single Input Single Output (SISO) and Single\ud Input Multiple Output (SIMO) ReMB designs. This paper\ud presents the necessary foundation and terminology needed for\ud developing a systematic synthesis technique. The companion\ud paper illustrates the synthesis method through examples. The\ud method proposed achieves reduced logic-depth and area over\ud standard multipliers / multiplier blocks
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