Location of Repository

A study on the effects of accumulated and independent clock jitter on discrete-time delta-sigma modulators

By Jaswinder Lota, Mohammed Al-Janabi and Izzet Kale

Abstract

This paper describes the effects of accumulated and independent clock jitters on the tonality and the Signal-to-Noise Ratio (SNR) of discrete-time delta-sigma modulators. Simulations demonstrate that accumulated clock jitter exhibits increased tonality in the magnitude spectrum of the delta-sigma modulator output especially at very high frequencies, while having no significant effect on the SNR. Independent clock jitter, on the other hand, degrades SNR performance but causes no increase in tonality

Topics: UOW3
Publisher: IEEE Computer Society
OAI identifier: oai:westminsterresearch.wmin.ac.uk:3232
Provided by: WestminsterResearch

Suggested articles

Preview

Citations

  1. Advanced Programming Techniques for Modular Synthesizers, Dept. of Elect.
  2. Analog-to-Digital Conversion & Flexible FDM Demultiplexing Algorithms for Digital On Board Processing for Ultra Wideband FDM Signals”,
  3. (1998). Analysis of Accumulated Timing-Jitter in the Time Domain”,
  4. (2003). Behavioral Modeling of Switched-Capacitor ?-? Modulators”,
  5. (2001). Clock Jitter Insensitive Continuous-Time Sigma Delta Modulators”,
  6. (1990). Effect of Sampling Jitter on some Sinewave Measurements”,
  7. (1992). Effective Dithering of Sigma-Delta Modulators”,
  8. (1992). FFT Processing of Randomly Sampled Harmonic Signals”,
  9. (1994). On the Use of Chaos to Reduce Idle-Channel Tones in Delta-Sigma Modulators”,
  10. (2004). Precise Behavioral Modeling of High-Resolution Switched-Capacitor ?-? Modulators”,
  11. The Effects of Aperture Jitter and Clock Jitter in Wideband ADCs”,
  12. (1990). The Effects of Timing Jitter in Sampling Systems”,

To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request.