research
oaioai:scholarship.rice.edu:1911/64215

An Efficient Circulant MIMO Equalizer for CDMA Downlink: Algorithm and VLSI Architecture

Abstract

We present an efficient circulant approximation-based MIMO equalizer architecture for the CDMA downlink. This reduces the direct matrix inverse (DMI) of size (NF×NF) with O((NF)3) complexity to some FFT operations with O(NF log2(F)) complexity and the inverse of some (N×N) submatrices.We then propose parallel and pipelined VLSI architectures with Hermitian optimization and reduced-state FFT for further complexity optimization. Generic VLSI architectures are derived for the (4×4) high-order receiver from partitioned (2 × 2) submatrices. This leads to more parallel VLSI design with 3× further complexity reduction. Comparative study with both the conjugate-gradient and DMI algorithms shows very promising performance/complexity tradeoff. VLSI design space in terms of area/time efficiency is explored extensively for layered parallelism and pipelining with a Catapult C high-level-synthesis methodology.National Science Foundatio

Similar works

Full text

thumbnail-image

DSpace at Rice University

Provided a free PDF
oaioai:scholarship.rice.edu:1911/64215Last time updated on 6/11/2012View original full text link

This paper was published in DSpace at Rice University.

Having an issue?

Is data on this page outdated, violates copyrights or anything else? Report the problem now and we will take corresponding actions after reviewing your request.