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Modelling and simulation of analog circuits in FPGA

By Dominik Kotulič

Abstract

Bachelor thesis is focused on seeking a suitable calculation algorithm of an exponential function which could be suitably implemented in ASIC and FPGA circuits. The first part of the thesis is aimed at brief clarifying of the issue of transients in accumulation circuits and their modelling in the program PSpice. The second part deals with seeking ways of model proposals of the exponential function appropriate for the implementation in ASIC and FPGA circuits. Subsequently, in the final part of the thesis we designed and tested two calculation algorithms of the model of the exponential function that are implemented for floating point numbers

Topics: systemc; FPGA; differetential equation; ASIC; bilinear transform; aproximation; forward euler method; exponential function; floating point number; Transient effect; backward euler method
Publisher: Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Year: 2015
OAI identifier: oai:invenio.nusl.cz:244430
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