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Accelerated Linear Genetic Programming in Hardware

By Josef Ťupa

Abstract

The aim of this thesis is to design and implement hardware acceleration of linear genetic programming for symbolic regression. The thesis contains a theoretical introduction into the studies of modern hardware and genetic programming design. Design and implementation of the LGP for symbolic regression is described in the rest of the thesis

Topics: lineární genetické programování; programovatelná hradlová pole; FPGA; VHDL; Hardware acceleration; linear genetic programming; Hardwarová akcelerace; symbolic regression.; symbolická regrese.; field-programmable gate array
Publisher: Vysoké učení technické v Brně. Fakulta informačních technologií
Year: 2009
OAI identifier: oai:invenio.nusl.cz:237284
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