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Design and Implementation of High- performance MAC Unit

By Shishir Kumar Das, Aniruddha Kanhe and R. H. Talwekar

Abstract

Abstract—In real-life, embedded devices like mobile phone, notebook computers are made use of RISC processor and DSP.In Digital Signal Processing (DSP) applications the critical operations usually involve many multiplications and/or accumulations. So, for real time signal processing, the high speed multiplier accumulator (MAC) unit is always a key element to achieve a high-performance digital signal processing. The goal of this project is to design and implement the MAC unit for high-speed DSP applications. For designing the MAC unit various multipliers and adders are required. The MAC unit is implemented using VHDL, synthesized and simulated using Xilinx ISE 12.1

Topics: Adders, CAD tools, multipliers, VHDL
Year: 2014
OAI identifier: oai:CiteSeerX.psu:10.1.1.415.6147
Provided by: CiteSeerX
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