Skip to main content
Article thumbnail
Location of Repository

ASSEMBLY CODE OPTIMIZATION TECHNIQUES FOR REAL TIME DSP IMPLEMENTATION OF SPEECH CODECS

By Manish Arora, Nitin Changdeo Lahane and Pradeep Srinivasan

Abstract

A lot of effort has been spent over the last many years in the development of digital speech coding methods and their subsequent standardization. Algorithms have evolved which provide good quality speech at sub 8 kbps bit rates although at a much higher computational expense. DSP processors have also improved with time, have been well molded by algorithms, providing specific signal processing functionalities aiding in easier codec implementations along with lower power consumption at higher clock speeds. Software development tools and compilers have also improved although they do not work well in high volume, low cost systems. The performance of the firmware critically determines the cost and performance of the overall systems. This paper describes techniques and approaches commonly used to realize systems where hand assembly is necessary to obtain the needed performance. The specific codec implemented was ITU-T G.729 Annex B. The techniques described in this paper are applicable to any speech codec and DSP processor platform. 1

Year: 2013
OAI identifier: oai:CiteSeerX.psu:10.1.1.353.1017
Provided by: CiteSeerX
Download PDF:
Sorry, we are unable to provide the full text but you may find it at the following location(s):
  • http://citeseerx.ist.psu.edu/v... (external link)
  • http://cseweb.ucsd.edu/~marora... (external link)
  • Suggested articles


    To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request.