In this paper we introduce a class of trees, called generalized compressed trees. Generalized compressed trees can be derived from complete binary trees by performing certain `contraction' operations. A generalized compressed tree CT of height h has approximately 25% fewer nodes than a complete binary tree T of height h. We show that these trees have smaller (up to a 74% reduction) 2-dimensional and 3-dimensional VLSI layouts than the complete binary trees . We also show that algorithms initially designed for T can be simulated by CT with at most a constant slow down. In particular, algorithms having non-pipelined computation structure and originally designed for T can be simulated by CT with no slow down. Index Terms binary tree machine, embedding, hypercube, parallel algorithm, pipelined computation, node load, simulation, VLSI layout (2-dimensional and 3-dimensional). 1 1 Introduction Parallel machines interconnecting up to thousands of nodes have been proposed and recently bu..
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