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A Parallel Implementation of the Reverse Converter for the Moduli Set {2 n,2 n –1, 2 n–1 –1}

By Mehdi Hosseinzadeh, Amir Sabbagh Molahosseini and Keivan Navi

Abstract

Abstract — In this paper, a new reverse converter for the moduli set {2 n, 2 n –1, 2 n–1 –1} is presented. We improved a previously introduced conversion algorithm for deriving an efficient hardware design for reverse converter. Hardware architecture of the proposed converter is based on carry-save adders and regular binary adders, without the requirement for modular adders. The presented design is faster than the latest introduced reverse converter for moduli set {2 n, 2 n –1, 2 n–1 –1}. Also, it has better performance than the reverse converters for the recently introduced moduli set {2 n+1 –1, 2 n,2 n –1} Keywordss — Residue arithmetic; Residue number system; Residue-to-Binary converter; Reverse converter

Year: 2013
OAI identifier: oai:CiteSeerX.psu:10.1.1.308.2771
Provided by: CiteSeerX
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