Steep-Slope Nanowire FET with a Superlattice in the Source Extension
Authors
Publication date
July 23, 2015
Publisher
'Institute of Electrical and Electronics Engineers (IEEE)'
Doi
DOI:10.1109/ESSDERC.2010.5618207
Abstract
none4In this work we present an investigation on a novel device concept meant to achieve a steep subthreshold slope by filtering out high-energy electrons entering the device channel. The filtering function is entrusted to a superlattice in the source extension region, which could possibly be fabricated by deposition of a number of appropriate semiconductor layers within a manufacturing process of vertical nanowires. Simulation results indicate that an SS = 26 mV/dec can be achieved using GaAs/AlGaAs as the constituent materials of the superlattice.mixedE. Gnani; S. Reggiani; A. Gnudi; G. BaccaraniE. Gnani; S. Reggiani; A. Gnudi; G. Baccaran
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