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Software/Hardware Cooperative Design and Verification for Model-Checking Systems

By Katsumi Wasaki and Naoki Iwasaki

Abstract

(SMV) and NuSMV are available for checking hardware designs. These tools can automatically check the formal legitimacy of a design. However, NuSMV is too low level for describing a complete hardware design. It is therefore necessary to translate the system definition, as designed in a language such as Verilog or VHDL, into a language such as NuSMV for validation. In this paper, we present a meta hardware description language, Melasy, that contains a code generator for existing hardware description languages (HDLs) and languages for model checking that solve this problem. Keywords—meta description language, software/hardware codesign, co-verification, formal verification, hardware compiler, model checking. I

Year: 2011
OAI identifier: oai:CiteSeerX.psu:10.1.1.193.182
Provided by: CiteSeerX
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