Skip to main content
Article thumbnail
Location of Repository

MT-098 TUTORIAL Low Voltage Logic Interfacing

By 

Abstract

For nearly 20 years, the standard VDD for digital circuits was 5 V. This voltage level was used because bipolar transistor technology required 5 V to allow headroom for proper operation. However, in the late 1980s, Complimentary Metal Oxide Semiconductor (CMOS) became the standard for digital IC design. This process did not necessarily require the same voltage levels a

Year: 2011
OAI identifier: oai:CiteSeerX.psu:10.1.1.189.296
Provided by: CiteSeerX
Download PDF:
Sorry, we are unable to provide the full text but you may find it at the following location(s):
  • http://citeseerx.ist.psu.edu/v... (external link)
  • http://www.analog.com/static/i... (external link)
  • Suggested articles


    To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request.