This section provides a high-level overview of the features of the MPC8572E processor. Figure 1 shows the major functional units within the MPC8572E. 1.1 Key Features The following list provides an overview of the MPC8572E feature set: • Two high-performance, 32-bit, Book E-enhanced cores that implement the Power Architecture® technology: — Each core is identical to the core within the MPC8572E processor. — 32-Kbyte L1 instruction cache and 32-Kbyte L1 data cache with parity protection. Caches can be locked entirely or on a per-line basis, with separate locking for instructions and data
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