Skip to main content
Article thumbnail
Location of Repository

Integrated Processor Hardware Specifications

By Mpce Powerquicc Iii

Abstract

This section provides a high-level overview of the features of the MPC8572E processor. Figure 1 shows the major functional units within the MPC8572E. 1.1 Key Features The following list provides an overview of the MPC8572E feature set: • Two high-performance, 32-bit, Book E-enhanced cores that implement the Power Architecture® technology: — Each core is identical to the core within the MPC8572E processor. — 32-Kbyte L1 instruction cache and 32-Kbyte L1 data cache with parity protection. Caches can be locked entirely or on a per-line basis, with separate locking for instructions and data

Year: 2011
OAI identifier: oai:CiteSeerX.psu:10.1.1.186.937
Provided by: CiteSeerX
Download PDF:
Sorry, we are unable to provide the full text but you may find it at the following location(s):
  • http://citeseerx.ist.psu.edu/v... (external link)
  • http://cache.freescale.com/fil... (external link)
  • Suggested articles


    To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request.