Skip to main content
Article thumbnail
Location of Repository

Realistic Workload Characterization and Analysis for Networks-on-Chip Design

By Paul V. Gratz and Stephen W. Keckler


As silicon device scaling trends have simultaneously increased transistor density while reducing component costs, architectures incorporating multiple communicating components are becoming more common. In these systems, networks-on-chip (NOCs) connect the components for communication and NOC design is critical to the performance and efficiency of the system. Typically, in NOC design traditional synthetic workloads are used to characterize the performance of the system. Previous work shows, however, that these traditional synthetic workloads do not accurately represent the characteristics of realistic network traffic. In this paper we propose the analysis of realistic traffic via a set of new workload characteristics. We show that thes

Year: 2010
OAI identifier: oai:CiteSeerX.psu:
Provided by: CiteSeerX
Download PDF:
Sorry, we are unable to provide the full text but you may find it at the following location(s):
  • (external link)
  • (external link)
  • Suggested articles

    To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request.