A VLSI implementation of an adaptive controller performing gradient descent optimization of external performance metrics using parallel synchronous detection is presented. Real-time model-free gradient estimation is done by perturbation of the metrics ’ control parameters with narrow-band deterministic dithers resulting in fast adaptation and robust performance. A fully translinear design has been employed for the architecture, making the controller operation scalable within a very wide range of frequencies and control bandwidths, and, therefore customizable for a variety of systems and applications. Experimental results from a SiGe BiCMOS implementation are provided demonstrating the broadband and high-speed performance of the controller
To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request.