Skip to main content
Article thumbnail
Location of Repository

Hardware for Speculative Parallelization in High-End Multiprocessors

By Ye Zhang, Lawrence Rauchwerger and Josep Torrellas

Abstract

Speculative parallel execution may well be the best way of speeding up codes whose dependences can not be analyzed by the compiler. Supporting speculative parallelization in hardware in Distributed Shared-Memory (DSM) multiprocessors is challenging because of the long-latency of memory accesses and the physical distribution of the memory system. Our approach is to add extensions to the cache coherence protocol hardware of the machine to automatically detect dependence violations at run time

Year: 2009
OAI identifier: oai:CiteSeerX.psu:10.1.1.135.378
Provided by: CiteSeerX
Download PDF:
Sorry, we are unable to provide the full text but you may find it at the following location(s):
  • http://citeseerx.ist.psu.edu/v... (external link)
  • http://chooyu.cs.uiuc.edu/iaco... (external link)
  • Suggested articles


    To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request.